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Method for fabricating semiconductor device

A semiconductor and gate technology, applied in the field of semiconductor devices, can solve problems such as SAC failure

Inactive Publication Date: 2010-09-08
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

During the SAC etch process, the overlap margin between the recessed gate region and the connection plug 18 will result in a SAC failure ('A') between the recessed gate 12 and the connection plug 18

Method used

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  • Method for fabricating semiconductor device
  • Method for fabricating semiconductor device
  • Method for fabricating semiconductor device

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Embodiment Construction

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Abstract

The present invention discloses a method for fabricating a semiconductor device which includes forming a recess gate over a semiconductor substrate. A gate spacer is formed on a sidewall of the recess gate. The semiconductor substrate in a landing plug contact region is soft-etched to form a recess having a rounded profile. A sidewall spacer is formed over the gate spacer and a sidewall of the recess. An insulating film is formed over the semiconductor substrate. The insulating film is selectively etched to form a landing plug contact hole. A conductive layer in the landing plug contact hole is filled to form a landing plug.

Description

technical field The present invention generally relates to a semiconductor device. More particularly, the present invention relates to a semiconductor device including a connection plug and a method of manufacturing the same. Background technique As semiconductor devices become more and more integrated, the space between conductive lines such as gates has been reduced in size. Thus, the process margin for forming contacts between wires has been reduced. To ensure a process margin for forming contacts, a self-aligned contact ("SAC") process may be performed. 1a and 1b are cross-sectional views illustrating a method for manufacturing a semiconductor device according to the prior art. A device isolation structure (not shown) defining an active region is formed over the semiconductor substrate 10 . A portion of the semiconductor substrate 10 is etched through a photolithography process using a mask defining a recessed gate region to form a recessed gate region (not shown). ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768
CPCH01L27/10888H01L27/11521H01L27/10855H01L21/76897H01L21/3065H01L29/6656H10B12/485H10B12/0335H10B41/30H01L21/768H01L21/28
Inventor 黄昌渊安炫
Owner SK HYNIX INC