Metal gate mosfet by full semiconductor metal alloy conversion

Abstract

A MOSFET structure and method of forming is described. The method includes forming a metal-containing layer (56) that is thick enough to fully convert the semiconductor layer (22) to a semiconductor metal alloy in a first MOSFET type region (40) but only thick enough to partially convert the semiconductor layer (20) to a semiconductor metal alloy in a second MOSFET type region (30). In one embodiment, the gate stack in a first MOSFET region (40) is recessed prior to forming the metal-containing layer (56) so that the height of the first MOSFET semiconductor stack is less than the height of the second MOSFET semiconductor stack. In another embodiment, the metal-containing layer (56) is thinned over a first type MOSFET region (40) relative to a second type MOSFET region (30) prior to the conversion process.

Description

technical field [0001] The present invention relates generally to the fabrication of integrated circuits, and more particularly to structures and methods of fabricating MOSFET (Metal Oxide Semiconductor Field Effect Transistor) devices having metal gates. Background technique [0002] Metal gate technology allows for improved MOSFET device performance compared to conventional semiconductor MOSFET devices using semiconductor gate electrodes due to the elimination of the depletion layer in the gate; thus, converting the electrical transition oxide thickness t inv A decrease of about 3-5 Å without resulting in a significant increase in gate oxide leakage current followed. Typically, the semiconductor gate electrode is formed of polysilicon (poly or poly-Si, amorphous silicon, SiGe, etc.). MOSFET devices with a fully silicided gate electrode (FUSI gate) allow for a thinner electrical transition oxide thickness t inv , which lead to improved device performance due to increased ...

AI Technical Summary

Problems solved by technology

Using different processes for silicidation of nFET and pFET gate conductors makes it difficult to integrate both nFET and pFET devices, especially in densely packed memory cells

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