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Method for shared translation for look-aside buffer

A buffer and backup technology, applied in the field of shared conversion backup buffers, can solve the problems of expensive, infeasible, and inefficient conversion backup buffers

Inactive Publication Date: 2010-10-06
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this is not feasible in some applications since providing a translation lookaside buffer for each thread is expensive and inefficient

Method used

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  • Method for shared translation for look-aside buffer
  • Method for shared translation for look-aside buffer
  • Method for shared translation for look-aside buffer

Examples

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Embodiment Construction

[0015] For cost and power considerations, it may be desirable to use a shared translation lookaside buffer among multiple processing threads. However, management of a software-programmed shared Translation Lookaside Buffer (TLB) is not trivial.

[0016] figure 1 A simplified logical block diagram of an embodiment of a portion of memory system 10 that is processor 11 . For example, processor 11 may be a general purpose microprocessor or a special purpose processor such as a digital signal processor (DSP). Memory system 10 includes memory locations 12 for storing data, instruction codes, and other data. In one embodiment of memory system 10, a section of memory called a thread-specific area (TSA) (14 and 15) is defined for each processing thread. Each TSA 14 and 15 includes a normal segment and at least one TLB segment. The TLB TSA section is dedicated to temporarily storing data during the process of handling TLB miss exceptions. For example, TSA 14 for thread 1 includes T...

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PUM

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Abstract

A shared translation look-aside buffer method comprises saving data stored in a first selected set of registers to a predetermined section of a thread-specific area in memory upon encountering an exception / interrupt, re-enabling exceptions and optionally interrupts, addressing a cause of the exception / interrupt while safely permitting another exception, and restoring the saved data to the first selected set of registers.

Description

technical field [0001] The present invention relates generally to the field of processors, and more particularly to shared translation lookaside buffers and methods. Background technique [0002] A Translation Lookaside Buffer (TLB) is a cache memory used to store currently used virtual-to-physical address translations. When a processor needs to access a memory location indicated by a virtual address, it queries the translation lookaside buffer for the memory location's corresponding physical address. If the translation lookaside buffer contains a given virtual address, it is a "hit" and the processor is provided the corresponding physical address. When a given virtual address is not in the translation lookaside buffer, then it is a "miss" and the processor must search or "walk" the page tables to find the corresponding physical address. The physical addresses are then provided or "filled" into the translation lookaside buffer. However, in the presence of a shared transla...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/48
CPCG06F12/1027G06F9/4812Y02D10/00
Inventor 埃里希·普罗恩德克威廉·C·安德森卢西恩·康德雷斯库
Owner QUALCOMM INC
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