Heterogeneous multi-core system thread-level dynamic dispatching method based on configurable processor

A heterogeneous multi-core, dynamic scheduling technology, applied in the computer field, can solve the problem of low efficiency of static scheduling and allocation, and achieve the effect of reducing complexity and learning time

Inactive Publication Date: 2008-11-05
SHANGHAI JIAO TONG UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The purpose of the present invention is to solve the deficiencies of the prior art, to provide a thread-level dynamic scheduling method for a heterogeneous multi-core system based on a configurable processor, for a heterogeneous multi-core system designed using a third instruction set, the method can enable

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  • Heterogeneous multi-core system thread-level dynamic dispatching method based on configurable processor
  • Heterogeneous multi-core system thread-level dynamic dispatching method based on configurable processor

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Embodiment Construction

[0029] The embodiments of the present invention are described in detail below in conjunction with the accompanying drawings: this embodiment is implemented on the premise of the technical solution of the present invention, and detailed implementation methods and specific operating procedures are provided, but the protection scope of the present invention is not limited to the following the described embodiment.

[0030] The specific implementation manner of the present invention will be described below by taking a heterogeneous multi-core system composed of three processing cores as an example.

[0031] a) Choose a heterogeneous multi-core structure

[0032] Each core has a hardware number, starting with 0 and increasing in sequence. The three cores are respectively recorded as core0, core1, and core2. Each processing core has a set of common instruction sets, which are recorded as ISA1. Core1 is extended with a set of instruction sets, which is recorded as ISA2. Core2 is ext...

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Abstract

A thread level dynamic scheduling method based on isomerization multicore system of configurable processor includes steps as follows: a first step, the isomerization multicore structure is composed of a set of configurable process cores, each process core is provided with a set of common instruction set, each core has an instruction set configuration core_isa, which represents that the core can operate certain instruction sets; a second step, the application program is divided into a plurality of threads, only data dependence exists between these threads, each thread is provided with an expectation instruction property thread_isa, representing that the thread uses the instruction set on which this instruction focused; a third step, the operating system and the application running on the operating system are translated and compiled into binary executable file all together, all the processor cores share a same operating system data area; a fourth step, after the completion of the above-mentioned steps, thread-level dynamic scheduling is carried out. The present invention solves the low allocation efficiency shortcoming of the static state scheduling, thereby reducing the learning time and simplifying the programming model.

Description

technical field [0001] The invention relates to a method in the field of computer technology, in particular to a thread-level dynamic scheduling method based on a configurable processor for a heterogeneous multi-core system. Background technique [0002] Existing task scheduling models can be roughly divided into two types: static scheduling and dynamic scheduling. Static scheduling means that the scheduling rules have been determined when the program is compiled, and the operating system or control program only needs to assign concurrent tasks to corresponding tasks according to the scheduling rules at runtime. On the contrary, the dynamic task scheduling does not determine the scheduling rules when the program is compiled, and the operating system or control program assigns concurrent tasks to a suitable processing core according to the current working state of the system at runtime, so Only the runtime can determine the execution sequence of tasks on each core. [0003] ...

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Application Information

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IPC IPC(8): G06F9/48
Inventor 付宇卓刘婷陈劭胡泊
Owner SHANGHAI JIAO TONG UNIV
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