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Stack type chip packaging structure and method for preparing stack encapsulation structure

A technology of chip packaging structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as warping of the packaging substrate and the first chip, and achieve the effect of improving reliability

Active Publication Date: 2008-11-12
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The object of the present invention is to provide a stacked chip package structure and a method for manufacturing the stacked package structure. , and it is easy to cause the package substrate and the first chip to warp

Method used

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  • Stack type chip packaging structure and method for preparing stack encapsulation structure
  • Stack type chip packaging structure and method for preparing stack encapsulation structure
  • Stack type chip packaging structure and method for preparing stack encapsulation structure

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Embodiment Construction

[0064] In order to make the above-mentioned features and advantages of the present invention more comprehensible, preferred embodiments are specifically cited below and described in detail with accompanying drawings.

[0065] Figure 2A-2F Shown is a schematic cross-sectional view of the manufacturing process of a stacked chip packaging structure according to an embodiment of the present invention. First, please refer to Figure 2A As shown, a substrate 210 , a first chip 220 and a second chip 230 are provided. Wherein, the substrate 210 has an upper surface 210a and a lower surface 210b opposite to it; the first chip 220 has a first surface 220a and a second surface 220b opposite to it; the second chip 230 has a third surface 230a and its opposite Opposite to a fourth surface 230b, and the second chip 230 has a plurality of bumps 232 disposed on the fourth surface 230b. Next, please refer to Figure 2B As shown, the third surface 230 a of the second chip 230 is fixed on t...

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Abstract

The invention relates to a manufacturing method for a stacked chip encapsulation structure, which comprises the following steps: firstly, a substrate, a first chip and a second chip are provided; wherein, one surface of the second chip is equipped with a plurality of projections; secondly, the second chip is fixed on one side of the first chip; thirdly, the second chip and the first chip are inversely arranged on the substrate; chip inversion joint technology is used for electrically connecting the second chip with the substrate through the projections; fourthly, the first chip is electrically connected with the substrate; finally, an encapsulation colloid is formed on the substrate for coating the first chip, the second chip and the projections.

Description

technical field [0001] The present invention relates to a manufacturing method of a chip packaging structure, and in particular to a stacked chip packaging structure and a manufacturing method of the stacked packaging structure. Background technique [0002] In today's information society, users are pursuing high-speed, high-quality, and multi-functional electronic products. As far as product appearance is concerned, the design of electronic products is moving towards the trend of light, thin, short and small. In order to achieve the above purpose, many companies incorporate the concept of systemization when designing circuits, so that a single chip can have multiple functions, so as to save the number of chips configured in electronic products. In addition, as far as electronic packaging technology is concerned, in order to meet the trend of light, thin, short and small design, packaging design concepts such as multi-chip module (MCM), chip scale package (chip scale packag...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/50
CPCH01L2924/15311H01L2924/181H01L2224/16225H01L2224/32145H01L2224/48091H01L2224/73204H01L2224/73265H01L2924/00014H01L2924/00012
Inventor 杨朝钦
Owner ADVANCED SEMICON ENG INC
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