Time of day synchronization and distribution within a multiprocessor embedded system and related methods
A processor, time-of-day technology, used in transmission systems, clocks driven by synchronous motors, instruments, etc.
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[0028] Various embodiments will be described more fully hereinafter with reference to the accompanying drawings in which preferred embodiments of the invention are shown. Many different forms may be set forth and the embodiments described should not be construed as limited to those set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like reference numbers in the drawings indicate like elements, and primed symbols are used to indicate like elements within alternative embodiments.
[0029] In one non-limiting embodiment of the invention, the free-running timer is synchronized within a counter, such as in a Field Programmable Gate Array (FPGA), and the time source is locked relative to the free-running counter. The system captures these deviations and distribution deviations in the system. Time can be as precise as it is clocked in the FPGA. ...
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