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Semiconductor device and method of manufacturing the same

A semiconductor and device technology, applied in the field of semiconductor devices, can solve problems such as uneven fuse stress distribution, increased fuse resistance, and changing physical properties.

Inactive Publication Date: 2008-12-24
NEC ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the interlayer film directly covering the fuse is not strong enough, impurities may diffuse into the fuse and change its physical properties, causing an increase in fuse resistance
On the other hand, the stress distribution of the fuse may become non-uniform, which may cause stress migration

Method used

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  • Semiconductor device and method of manufacturing the same
  • Semiconductor device and method of manufacturing the same
  • Semiconductor device and method of manufacturing the same

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0027] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. 2 is a schematic cross-sectional view showing the structure before the fuse is blown in the semiconductor device of the present embodiment. The semiconductor device includes a substrate 1 (for example, a silicon substrate), a plurality of insulating films 3-0 to 3-6 (for example, a silicon dioxide film) formed on the substrate 1, and an interlayer insulating film covering the uppermost layer. Passivation film 11 (for example, silicon oxide film) of film 3-6. In addition, the semiconductor device is provided with a device formation region where semiconductor transistors and the like are formed, and a fuse formation region where fuses are formed.

[0028] In the device formation region, isolation regions 5 and source / drain regions 4 are formed on the surface of substrate 1 . A first insulating film 3 - 0 is also formed on the surface of the substrate 1 . Gat...

no. 2 example

[0054] Next, a second embodiment will be explained. FIG. 6 is a schematic cross-sectional view showing the structure of the semiconductor device of the present embodiment. In the first embodiment, the case has been described in which the fuse 8-1 and the interconnection 7-1 in the device formation region are formed of the same material and in the same step. However, in the present embodiment, the fuse 8-2 is formed in the same step as the gate electrode 2 of the semiconductor transistor. The rest of the structure is the same as in the first embodiment, and therefore, will not be described in detail.

[0055] As shown in FIG. 6, the gate electrode 2 is formed in the insulating film 3-0 in the device formation region. Gate electrode 2 is formed of polysilicon. In addition, the fuse 8-2 is buried in the insulating film 3-0 (first insulating film) in the fuse formation region. Like the gate electrode 2, the fuse 8-2 is formed of polysilicon. Gate electrode 2 and fuse 8-2 are ...

no. 3 example

[0059] Subsequently, a third embodiment will be explained. FIG. 7 is a schematic cross-sectional view showing the structure of the semiconductor device of the present embodiment. In the first embodiment, the case has been described in which the fuse 8-1 and the interconnection 7-1 in the device formation region are formed of the same material and in the same step. However, in the present embodiment, the fuse 8-3 and the interconnection 7-4 in the device formation region are formed of the same material and in the same step. That is, the fuse 8-3 is provided in the insulating film 3-4 (on the insulating film 3-3).

[0060] In this embodiment, hole forming patterns 9 and holes 10 are provided on insulating films 3-4 and 3-5. That is, holes 10 are provided in the insulating films 3-5 and 3-6 (second insulating films). Neither the hole forming pattern 9 nor the hole 10 is formed in a layer not lower than the insulating film 3-4 (first insulating film).

[0061] The rest of the ...

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PUM

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Abstract

A semiconductor device in accordance with the present invention includes a fuse formed on a substrate; a first insulator film provided so as to cover the fuse; cavity-forming pattern provided in the layer on the first insulator film; and second insulator film provided so as to cover the cavity-forming pattern, wherein the cavity-forming pattern is patterned so that a spatial area is produced therebetween and the second insulator film covers the cavity-forming pattern so that a cavity is produced in the spatial area.

Description

technical field [0001] The present invention relates to a semiconductor device having a fuse and a method of manufacturing the semiconductor device. Background technique [0002] In some cases, semiconductor devices are provided with fuses and redundant circuits (redundancy) in order to replace one or more defective circuits. If certain circuits become defective, they are replaced by redundant circuits by blowing fuses. Thus, defective chips are kept. [0003] A method of blowing a fuse includes irradiating the fuse with laser light and flowing an overcurrent through the fuse. When blowing a fuse by irradiation with laser light, it is desirable to blow only a portion of the fuse to be cut and not cause damage to a portion of the fuse that is not cut. Japanese Patent Laid-Open Nos. 2004-153174 and 11-345880 describe techniques for reliably blowing only a portion of a fuse that is to be cut. [0004] On the other hand, when blowing a fuse, it is necessary to cut the fuse r...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/525H01L21/768
CPCH01L23/5256H01L23/5258H01L2924/0002H01L2924/00
Inventor 小田公规
Owner NEC ELECTRONICS CORP
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