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Test system and method for reducing signal attenuation of test integrated circuit

A test signal and test system technology, applied in the direction of measuring electricity, measuring electrical variables, electronic circuit testing, etc., can solve problems such as uninterpretable data and test signal attenuation

Inactive Publication Date: 2009-05-13
NAN YA TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] To sum up, when the test system performs high-speed testing, it is necessary to separate the signals of the driver and the receiver, transmit a test signal to an object under test through a first signal line, and then transmit the test signal through a second signal line However, at this time, the returned test signal will be seriously affected by the resistance pit of the first signal line, resulting in attenuation of the test signal, and excessive signal attenuation may lead to failure to interpret the correct data

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  • Test system and method for reducing signal attenuation of test integrated circuit
  • Test system and method for reducing signal attenuation of test integrated circuit
  • Test system and method for reducing signal attenuation of test integrated circuit

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Embodiment Construction

[0024] Please refer to image 3 , image 3 It is a schematic diagram of the test system of the present invention. The testing system includes a testing machine 30 , a first signal line 32 , a second signal line 34 , a probe card 36 , a first switch 38 and a DUT 39 . The testing machine 30 has a driver 41 and a receiver 49. The driver 41 is coupled to the first connection point C1 of the probe card 36 through the first signal line 32, and the receiver 49 is coupled to the probe through the second signal line 34. The second connection point C2 of the card 36 . The first connection point C1 and the second connection point C2 are coupled to the same solder pad B, and the solder pad B is electrically connected to the bond pad A of the object under test 39 through corresponding pins (needle). According to the present invention, the first switch 38 is coupled to the current path between the driver 41 and the object under test 39. In this embodiment, the first switch 38 is coupled ...

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Abstract

The invention discloses a test system for reducing signal attenuation of testing an integrated circuit and a method thereof. The integrated circuit test system comprises a probe card, a driver, a receiver and a first switch. The driver is coupled to the probe card by a first signal line, the receiver is coupled to the probe card by a second signal line, and the first switch is coupled between the probe card and the first signal line. The driver outputs a test signal to an object to be tested by the first signal line, the first switch is turned off, and the receiver reads the test signal by the second signal line, therefore, attenuation of the test signal can be reduced.

Description

technical field [0001] The invention relates to a test system, in particular to a test system for reducing signal attenuation of a test integrated circuit. Background technique [0002] Semiconductor components and integrated circuits must be continuously tested during the manufacturing process. Since the current integrated circuits have the function of processing high-speed signals, high-speed testing is also required, which increases the difficulty of testing. When the integrated circuit is tested at high speed, there is a certain signal delay and attenuation between the transmission line and the related interface, so the test system must separate the signal of the driver and the receiver. This structure is called F1y-by. [0003] Please refer to figure 1 , figure 1 It is a schematic diagram of the test system of the prior art. The testing system includes a testing machine 10 , a first signal line 12 , a second signal line 14 , a probe card 16 and a DUT 19 . The testi...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28G01R1/073
Inventor 吴顺科
Owner NAN YA TECH