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Power-failure memory protection method

A power-down memory and protection circuit technology, which is applied in the direction of responding to the generation of errors, redundancy in calculations for data error detection, etc., to achieve the effect of low power consumption

Inactive Publication Date: 2009-07-15
TCL TECH ELECTRONICS (HUIZHOU) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, with the rapid development of technology, more and more data information needs to be memorized by the power-off memory protection circuit, and the power consumption in the standby state is lower and lower. Protection method is no longer applicable

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Embodiment Construction

[0027] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0028] see figure 1 , is a schematic block diagram of a power-fail memory protection circuit applying an embodiment of the present invention (the power-fail memory protection method provided by the present invention is very suitable for use on DVD players). It can be seen from the figure that the power-down memory protection circuit applying this embodiment includes a CPU 1 , a rewritable memory 2 , a power supply circuit 3 and a peripheral interface 4 .

[0029] The CPU1 is bidirectionally connected to the rewritable memory 2 and the peripheral interface 4 respectively.

[0030] The power circui...

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Abstract

The present invention provides a power failure memory protecting method which is applied in the power failure memory protecting circuit. The power failure memory protecting circuit comprises a CPU, an erasable memory, a power source circuit and a peripheral interface. After power failure, the CPU circularly writes the data package into the data area of erasable memory and does corresponding record in the token area of erasable memory. Furthermore the latest data package stored in the data area is searched through the record in the token area after power failure. The method comprises a circulating storing process of data after electrifying and backtracking process of data after power failure. The invention circularly stores the data in the erasable memory and searches the latest data information before power failure through the backtracking mode after the secondary opening. Furthermore an auxiliary power source is not required in standby state or power-off state. The method of the invention has the advantages of bulk information memorizing, little power consumption, etc.

Description

technical field [0001] The invention belongs to the field of power-down memory protection, in particular to a power-down memory protection method for a power-down memory protection circuit in an electronic product. Background technique [0002] With the development of science and technology and the information industry, there are more and more smart devices, but for many smart devices, unexpected power failure during software operation is normal, and it is necessary to realize data protection during unexpected power failure. [0003] Generally speaking, the power-fail memory protection method of the existing power-failure memory protection circuit for optical disc data generally saves a small amount of working status through devices such as relays or capacitors. device power. However, with the rapid development of technology, more and more data information needs to be memorized by the power-off memory protection circuit, and the power consumption in the standby state is low...

Claims

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Application Information

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IPC IPC(8): G06F11/14
Inventor 徐晓春
Owner TCL TECH ELECTRONICS (HUIZHOU) CO LTD
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