Matrix transposition automatic control circuit system and matrix transposition method

Abstract

The invention discloses a matrix transposition automatic control circuit system and a matrix transposition method. The circuit system comprises a configuration register, a control register, a transposition module and a status register, wherein the configuration register is used to receive the input data and transfer the configuration information to the transposition module; the control register is used to receive the input data and control the read and write requests sent by the transposition module; the transposition module is used to receive the information of the configuration register andthe control register and complete the transposition operation of matrix according to the information; and the status register is used to store the ending signal of the transposition operation of matrix and return the ending signal. The circuit system and the matrix transposition method can be used to increase the utilization of the cache block and the data bus so as to increase the efficiency of transposition.

Description

Technical field [0001] The invention relates to the field of computer technology, in particular to a matrix transposition automatic control circuit system and a matrix transposition method. Background technique [0002] A matrix is ​​a well-known data structure in computers, and it is a generalization of linear tables. In today's computer applications, matrix transposition operations are needed in fields such as scientific and engineering calculations, games, and image processing. [0003] In the prior art, because it takes a long time to access the memory each time, if only one byte of data of the source matrix is ​​read from the memory each time and then placed in the cache block, it will not only waste precious data bus Bandwidth will also cause the waste of other bytes in the cache block and increase the reading time. When writing to the memory, writing data one by one will also bring similar problems. Summary of the invention [0004] The purpose of the present invention is ...

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Problems solved by technology

[0003] In the prior art, because it takes a long time to access the memory each time, if only one byte of data of the source matrix is ​​read from the memory each time and then placed in the cache (cache) block, not only will the precious data bus be wasted Bandwidth, also wastes resources for other bytes in the cache block, and increases read time

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