Duplexer, substrate for duplexer and electronic device
A duplexer, substrate technology, applied in the direction of electrical components, multiple fixed capacitors, impedance networks, etc.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
no. 1 example
[0034] figure 2 is a block diagram illustrating the duplexer 100 according to the first embodiment. Such as figure 2 shown, with figure 1 In contrast, in the first embodiment, the phase shift circuit 30 is connected in series with the reception filter 20 between the reception filter 20 and the reception terminal Rx. The capacitor 40 is connected in parallel with the reception filter 20 between the common terminal Ant and the reception terminal Rx. The phase shift circuit 30 is a circuit that shifts the phase of the passband signal of the receive filter 20 . A capacitor 40 connects the common terminal Ant to the receiving terminal Rx at high frequencies (for example, from 800 MHz to 2.5 GHz for mobile phones) and disconnects it at direct current.
[0035] image 3 is a diagram illustrating the configuration of the duplexer circuit according to the first embodiment. The transmit filter 10 and the receive filter 20 may be ladder-type filters. In the transmission filter 1...
no. 2 example
[0050] The second embodiment is an example in which the number of capacitor forming units is three. Figure 10 is a plan view of the fillet layer 51 according to the second embodiment. Such as Figure 10 As shown, in the second embodiment, another capacitor forming unit 64c is formed using the receiving fillet Rxf and another interconnection 60c overlapping the other side 65c different from the two sides 65a and 65b. The capacitor forming unit 64c is connected in parallel with the two capacitor forming units 64a and 64b. Other configurations are the same as those of the first embodiment Figure 9A The configuration shown is the same. As described in the second embodiment, the number of capacitor forming units may be three. Therefore, the capacitance value of the capacitor 40 can be increased.
no. 3 example
[0052] The third embodiment is an example in which the number of capacitor forming units is four. Figure 11 is a plan view of the fillet layer 51 according to the third embodiment. Such as Figure 11 As shown, in the third embodiment, another two capacitors are formed using the receiving fillets Rxf and two other interconnects 60c and 60d overlapping the other two opposite sides 65c and 65d different from the two sides 65a and 65b Cells 64c and 64d are formed. The capacitor forming units 64c and 64d are connected in parallel with the two capacitor forming units 64a and 64b. Other configurations are the same as those of the first embodiment Figure 9A The configuration shown is the same. As described above, the number of capacitor forming units may be four. Therefore, the capacitance value of the capacitor 40 can be increased.
[0053] Preferably, in the second and third embodiments, the further sides 65c and 65d are perpendicular to the sides 65a and 65b. In addition, ...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 