3results about How to "Improve isolation characteristics" patented technology

In a connector in which a flat conductor is connected to a substrate, the isolation characteristics of the connector are improved, and noise is reduced. A connector (1) is provided with a signal terminal, first ground terminals (21), second ground terminals (31), and a housing (51), the housing (51) having an insertion portion (52) for inserting an end portion of a flat conductor into the housing (51) from the front of the housing (51), the first ground terminals (21) being respectively disposed on the right and left of the signal terminal, the signal terminal and the first ground terminals (21) extending forward from the rear of the housing (51), and the second ground terminals (31) extending forward from the rear of the housing (51). The second ground terminal (31) is disposed on the right of the first ground terminal (21) on the right side or on the left of the first ground terminal (21) on the left side, and extends rearward from the front portion of the housing (51), and when the connector (1) is viewed from the right side or the left side, the front portion of the signal terminal, the front portion of the first ground terminal (21), and the rear portion of the second ground terminal (31) overlap each other.

The invention discloses an SOI (Silicon On Insulator)-based germanium-silicon heterojunction bipolar transistor collector region structure and a processing method thereof. The structure comprises a silicon-on-insulator base structure; covering a silicon oxide layer; etching a groove which passes through the covering silicon oxide layer and the silicon-on-insulator base structure and extends into the p-type lightly doped silicon substrate; the silicon oxide inner side wall is formed on the side wall of the etching groove and extends to the p-type lightly doped silicon substrate, and a cavity is defined in the etching groove; the non-doped silicon epitaxial layer is positioned at the bottom of the cavity and is formed on the p-type lightly doped silicon substrate; the n-type heavily-doped silicon buried layer collector region is formed on the non-doped silicon epitaxial layer, and the bottom of the n-type heavily-doped silicon buried layer collector region is higher than the bottom of the silicon oxide inner side wall; and the n-type lightly doped silicon epitaxial collector region is formed on the n-type heavily doped silicon buried layer collector region. The collector region-substrate parasitic capacitance is effectively reduced, the device isolation is improved, and the frequency response performance and the operation reliability of a radio frequency and high-speed circuit can be improved.

This invention provides a high-power, high-isolation coaxial power divider / combiner, relating to the field of microwave communication device technology. It solves the limitations of traditional power dividers / combiners, such as poor standing wave ratio (SWR) at the power divider ports and lack of isolation between adjacent ports. The power divider / combiner includes a common port, multiple branch ports, and multiple branch line structures. The common port is located on one of the branch line structures, which symmetrically connects to the other branch line structures, which in turn connect to the multiple branch ports. Each branch line structure also has multiple isolation ports for connecting isolation resistors. When used as a power divider, the common port receives the signal input, and each branch port outputs a signal with evenly distributed energy. When used as a combiner, the principle is reversed. This invention, through structural design and the use of isolation resistors, ensures the SWR at the output ports and guarantees the isolation between adjacent ports.