Method for making packaging substrate with recess structure

Abstract

The invention discloses a method for making a packaging substrate with a recess structure. The method comprises the following steps of: providing a connecting plate which comprises a first circuit layer, a first solder mask layer covered on the first circuit layer and a joint layer arranged on the first solder mask layer; providing a main body circuit board which at least comprises a second circuit layer and a second solder mask layer covering the second circuit layer, wherein the second solder mask layer comprises a plurality of openings for exposing part of the second circuit layer; forming a plurality of conductive bump structures in the plurality of openings; and laminating the connecting plate and the main body circuit board to ensure that the conductive bump structures are firmly coated and laminated in a structure consisting of the first solder mask layer, the joint layer and the second solder mask layer.

Description

technical field [0001] The invention relates to a method for manufacturing a packaging substrate, in particular to a method for manufacturing a high-density packaging substrate with a cavity structure. Background technique [0002] In recent years, the rapid development of three-dimensional (3D) packaging has not only greatly reduced the area occupied by the memory on the circuit board, but also improved the efficiency of electronic products after shrinking, and can integrate chips with different functions into the same packaging module. , to achieve high benefits of System in Package (SiP). Among them, the package-on-package structure (PoP) is a type of three-dimensional structure. For example, the package-on-package structure can greatly reduce high-level components by integrating high-capacity memories and complex processors. The circuit board space of the mobile phone. [0003] figure 1 What is shown is a schematic cross-sectional structure diagram of a traditional pa...

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Problems solved by technology

[0004] The above-mentioned conventional package-on-package structure includes at least the following disadvantages: (1) The size of the solder ball 40' is limited by the distance between the first substrate 22' and the second substrate 32'

The height of the solder balls 40' must exceed the height of the molding material 24' to ensure the electrical connection between the first substrate 22' and the second substrate 32', so the pitch of the solder balls cannot be further reduced, resulting in solder balls The number of balls 40' and the number of input / output pins (I / O) are difficult to increase; (2) the coefficient of thermal expansion (CTE) of the first substrate 22' and the second substrate 32' is different, so that the solder balls 40' may be affected to different degrees. Stress affects the reliability of the package; (3) it is not easy to control the coplanarity of the solder ball 40', so that the margin (process window) of the packaging process is small; (4) the first substrate 22' and the second substrate need to be additionally The glue filling step between the two substrates 32'; (5) the stacking volume is relatively large

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