System-in-a-package (SIP) structure of semiconductor device and manufacturing method thereof

Abstract

The invention relates to a system-in-a-package (SIP) structure of a semiconductor device, comprising a passive component, a base plate, a pad, a first chip, a second chip and a plastic package material, wherein the first chip is larger than the second chip in size. The invention also relates to a method for manufacturing the system-in-a-package (SIP) structure of the semiconductor device. The first chip is arranged on the base plate and is connected with the pad on the base plate by a first bonding wire, the second chip is arranged on the passive component or a geometric body made from high heat conduction material and is connected with by the pad on the base plate by a second bonding wire, so that the second chip can be place right above the first chip in a suspended manner; the plastic package material encapsulates the first chip, the second chip, the passive component, the first bonding wire and the second bonding wire. The invention has the advantages of small packaging size, small packaging density and good frequency response, thus meeting electric property requirements on system-in-a-package.

Description

technical field [0001] The invention relates to a system-in-package structure of a semiconductor device and a manufacturing method thereof in the field of semiconductor packaging technology, in particular to a system-level plastic package that can place a large-size chip in the air directly above a small-size chip when applied to a semiconductor device system-level plastic package Technology. Background technique [0002] At present, semiconductor integrated circuits and semiconductor devices are the most important components of all electronic products, and the largest number of them are integrated circuits and discrete devices packaged in plastic. In order to make the plastic packaged semiconductor device have more powerful functions, a variety of functional chips, including functional chips such as processors, memories, and even passive components such as capacitors, are integrated into one package to achieve a basically complete function. , This type of package is usuall...

AI Technical Summary

Problems solved by technology

The disadvantages of this system-in-package structure and manufacturing method of semiconductor devices are large package volume and low package density.

The disadvantage of the system-in-package structure and manufacturing method of this semiconductor device is that the packaging density is low, and the bigger disadvantage is that when the first chip 5 is a radio frequency circuit, the first bonding wire 7 connecting the pad 3 on the substrate 4 Too long will result in poor frequency response and cannot meet the electrical performance requirements of the system-in-package

Images