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Memory controller self-calibration for removing systemic influence

A memory controller and self-calibration technology, applied in static memory, read-only memory, information storage, etc., can solve the problems of high cost per bit, low storage capacity, etc.

Active Publication Date: 2010-08-04
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, SSDs currently have much lower storage capacities and significantly higher cost per bit compared to HDDs with the same form factor

Method used

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  • Memory controller self-calibration for removing systemic influence
  • Memory controller self-calibration for removing systemic influence
  • Memory controller self-calibration for removing systemic influence

Examples

Experimental program
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Embodiment Construction

[0020] In the following detailed description of embodiments of the invention, reference is made to the accompanying drawings which form a part hereof, and in which are shown by way of illustration specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and procedural, electrical, or mechanical changes may be made without departing from the scope of the invention. Accordingly, the following detailed description should not be considered in a limiting sense, and the scope of the invention is defined only by the following claims and their equivalents.

[0021] Traditional solid-state memory devices communicate data in the form of binary signals. Typically, the ground potential represents a first logic level (i.e., the first bit level) of a data bit, such as a '0' data value, while the power potent...

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PUM

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Abstract

Self-calibration for a memory controller is performed by writing a voltage to a selected cell. Adjacent cells around the selected cell are programmed. After each of the adjacent programming operations, the voltage on the selected cell is read to determine any change in voltage caused by systemic offsets such as, for example, floating gate-to-floating gate coupling. These changes are averaged and stored in a table as an offset for use in adjusting a programming voltage or a read voltage in a particular area of memory represented by the offset. Self calibration method for temperature is determined by writing cells at different temperatures and reading at different temperatures to generate temperature offset tables for the write path and read path. These offset tables are used to adjust for systematic temperature related offsets during programming and during read.

Description

technical field [0001] The present invention relates generally to semiconductor memory, and more particularly, in one or more embodiments, to solid-state non-volatile memory devices. Background technique [0002] Electronic devices typically have some type of mass storage available to them. A common example is a hard disk drive (HDD). HDDs are capable of large amounts of storage at relatively low cost, and current consumer HDDs have capacities in excess of one terabyte. [0003] HDDs typically store data on rotating magnetic media discs. Data is usually stored on the record as a flux reversal pattern. When writing data to a typical HDD, the disc is rotated at a relatively high speed while a write head floating above the disc generates a series of magnetic pulses to align the magnetic particles on the disc to represent the data. When reading data from a typical HDD, a magnetoresistive read head induces a change in resistance as it floats over a high-speed rotating disc. ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/06G11C29/00
CPCG11C16/20G11C16/04G11C29/50004G11C29/50G11C16/10G11C29/028G11C29/12005G11C2029/5004
Inventor 弗朗姬·鲁帕尔瓦尔维沙尔·萨林俊·S·辉
Owner MICRON TECH INC
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