Semiconductor device

Abstract

A semiconductor device includes a substrate with one or more active regions and an isolation layer formed to surround an active region and to extend deeper into the substrate than the one or more active regions. The semiconductor further includes a gate electrode, which covers a portion of the active region, and which has one end portion thereof extending over the isolation layer.

Description

[0001] Cross References to Related Applications [0002] This application claims priority under 35 U.S.C. §119 to Korean Patent Application No. 10-2009-110927 filed on November 17, 2009, which is hereby incorporated by reference in its entirety. technical field [0003] The present invention relates generally to the fabrication of semiconductor devices; and more particularly to the fabrication of high voltage semiconductor devices. Background technique [0004] Various integrated circuits including one or more high voltage transistors together with low voltage circuitry are widely used in different electrical applications. High voltage transistors such as extended drain MOS (EDMOS) transistors, lateral double diffused MOS (LDMOS) transistors, and the like occupy a large amount of space in such integrated circuits. [0005] To keep pace with the trend towards higher integration densities, there is also a need to scale down high voltage semiconductor devices in size while sti...

AI Technical Summary

Problems solved by technology

[0008] Because the adjacent active regions 22 are isolated from each other by the P-type impurity region 14 having a conductivity type different from that of the N-type second well 12, this conventional EDMOS transistor has the following defects: In addition to the P-type impurity region 14, a non-conductive operating region in order to ensure isolation between the active regions 22 which may have different potentials from each other and also to allow a sufficiently high operating voltage of the active region 22

[0010] The need to include non-operating regions makes it difficult to increase the integration density of EDMOS transistors

This problem may not be a problem only associated with EDMOS transistors, but may be common to all junction-isolated high-voltage semiconductor devices

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