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Integrated circuit design method

An integrated circuit and design method technology, applied in the field of integrated circuit design, can solve the problems of reducing design flexibility and design margin, failing to achieve full-chip design finalization, and failing to maximize mode efficiency, and achieves the improvement of optical performance and electrical performance. Effect

Inactive Publication Date: 2011-06-29
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Without maximizing mode efficiency, it is impossible to reach a full-chip design finalization, such as the final design product
In another problem, the statistical angle is used as a design reference, which will reduce the design flexibility and design margin
In addition, many interactions between designers and semiconductor manufacturers are required to utilize a design layout from a first technology node to manufacture a second technology node component

Method used

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  • Integrated circuit design method
  • Integrated circuit design method
  • Integrated circuit design method

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Embodiment Construction

[0038] It can be appreciated that the following disclosure provides many different embodiments, or examples, for implementing various features of the invention. Specific examples of components and arrangements are described below to simplify the present invention. Of course these are examples only, not limitations. For example, in the description, a first feature formed on or over a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include that additional features may be formed on the first and second features. An embodiment in which the first and second features are not in direct contact between the second features. In addition, the present invention may repeat reference numerals and / or characters in each example. Such repetition is for simplicity and clarity and is not, by itself, intended to dictate a relationship between the various embodiments and / or configurations discussed.

[0039] In traditional...

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Abstract

The present disclosure provides an integrated circuit design method in many different embodiments. An exemplary IC design method comprises providing an IC design layout of a circuit in a first technology node; migrating the IC design layout of the circuit to a second technology node; applying an electrical patterning (ePatterning) modification to the migrated IC design layout according to an electrical parameter of the circuit; and thereafter fabricating a mask according to the migrated IC design layout of the circuit in the second technology node.

Description

[0001] cross reference [0002] This invention is related to the following commonly-assigned U.S. patent application, which is hereby incorporated by reference in its entirety: U.S. Patent filed October 13, 2008 for Yung-Chin HOU et al. Application No. 12 / 250424 "TABLE-BASED DFM FOR ACCURATE POST-LAYOUTANALYSIS" (Attorney No. TSMC 2008-0074); and in 2009 US Patent Application No. 12 / 625749 "Customized Pattern Modification and Optimization (CUSTOMIZED PATTERNING MODULATION AND OPTIMIZATION)" filed on November 25, 2009 and the inventor is Ying-Chou Cheng et al. technical field [0003] The present invention relates to an integrated circuit, and more particularly to a method for designing an integrated circuit. Background technique [0004] The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of integrated circuit development, functional density (ie, the number of interconnected elements per chip area) has generally decreased as geome...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
CPCG06F17/5081G06F2217/12G06F2119/18G06F30/398Y02P90/02
Inventor 郑英周欧宗桦冯睿璇蔡正隆刘如淦黄文俊
Owner TAIWAN SEMICON MFG CO LTD
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