Unlock instant, AI-driven research and patent intelligence for your innovation.

Static discharge protection device for gate insulation dual junction transistor

A technology of electrostatic discharge protection and gate insulation, which is applied in the direction of electrical components, electric solid-state devices, semiconductor devices, etc., and can solve problems such as impact, low concentration of control dispersion, and high impedance

Active Publication Date: 2013-04-10
VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the use of silicon-on-insulator (SOI) substrates and related processes will adversely affect the heat dissipation of ESD components, so the industry urgently needs to effectively deal with the problem of heat dissipation of ESD components
In particular, in the process of ultra-high voltage components, the concentration of wells (well) is low, so that the relative impedance is also high, which is not conducive to a more uniform start-up (uniform turn-on) of ESD components.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Static discharge protection device for gate insulation dual junction transistor
  • Static discharge protection device for gate insulation dual junction transistor
  • Static discharge protection device for gate insulation dual junction transistor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0044] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, the preferred embodiments are specifically cited below, and in conjunction with the accompanying drawings, the detailed description is as follows:

[0045] Hereinafter, each embodiment is described in detail and an example accompanied by drawings is used as a reference basis of the present invention. In the drawings or descriptions in the specification, similar or identical parts all use the same figure numbers. And in the drawings, the shape or thickness of the embodiments may be enlarged, and marked for simplicity or convenience. Furthermore, the parts of the components in the drawings will be described separately. In addition, the specific embodiments are only used to disclose the specific methods used in the present invention, and are not intended to limit the present invention.

[0046] Figure 1A is a schematic cross-sectional view show...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a static discharge protection device for a gate insulation dual junction transistor, which comprises a semiconductor substrate, a high-voltage N-type well arranged in the semiconductor substrate, a patterned insulation region arranged on the high-voltage N-type well and defining a first active region and a second active region, an N-type double diffusion region arranged in the first active region of the high-voltage N-type well, a P-type heavily-doped drain region arranged in the N-type double diffusion region, and a P-type body doped region arranged in the second active region of the high-voltage N-type well, wherein the N-type double diffusion region keeps a specific distance from the P-type body doped region to expose the high-voltage N-type well; a pair of neighboring N-type and P-type heavily-doped source regions are arranged in the P-type body doped region; moreover, a gate structure is arranged on the high-voltage N-type well; one end of the gate structure is connected with the N-type heavily-doped source region; and the other end of the gate structure extends on the patterned insulation region.

Description

[0001] This application is a divisional application, the original application date is November 3, 2008, the application number is 200810174775.5, and the invention name is: gate insulating double junction transistor electrostatic discharge protection element. technical field [0002] The present invention relates to an electrostatic discharge protection device, in particular to an electrostatic discharge protection element for a gate insulating double-junction transistor (IGBT). Background technique [0003] Traditional high-voltage electrostatic discharge (ESD) protection components include laterally diffused metal oxide semi-power transistors (LDMOS Power Transistors), metal oxide semi-transistors (MOSFETs), silicon-controlled rectifiers (SCRs), bicarrier transistors ( BJT), diode (Diode) and field oxide transistor (Field Oxide Device, FOD). In terms of high-voltage electrostatic discharge protection, due to its excessively high trigger voltage (trigger voltage) and low ho...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/739H01L29/06H01L29/08H01L27/02
Inventor 周业宁杜尚晖张睿钧吴振玮
Owner VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION