Microblaze soft core technology-based LED (Light Emitting Diode) large-screen asynchronous control system

Abstract

The invention discloses a Microblaze soft core technology-based LED (Light Emitting Diode) large-screen asynchronous control system, which at least comprises a communication interface module, a content and stunt processing display module and a display output module, wherein the communication interface module is used for realizing communication between the control system and external equipment; the content and stunt processing display module is used for displaying content and stunt processing; the display output module is used for converting the displayed content into an interface time sequence output of an LED large screen; and the communication interface module, the content and stunt processing display module and the display output module are in parallel operation. In the system, the characteristic of parallel operability between soft cores can be fully utilized, processing efficiency of data is increased to the greatest extent, and cost of the control system is reduced.

Description

technical field [0001] The invention relates to the technical field of large LED screens, in particular to an asynchronous control system for large LED screens based on Microblaze soft-core technology. Background technique [0002] With the reduction of the cost of LED panels, the application range of LED large screens has become more and more extensive. Various application environments have put forward higher technical requirements for the performance of LED control systems, and at the same time require that the cost should not be greatly increased. [0003] The LED asynchronous control system is mainly composed of three parts: communication interface module, display content and special effect processing module and display output module. Among them, the communication interface module is mainly used to realize the communication between the control system and the computer (PC) or other equipment, the display content and special effect processing module is mainly responsible f...

AI Technical Summary

Problems solved by technology

[0006] 1. The real parallel operation cannot be realized among the modules, and each module needs to share the bandwidth and processing power of the CPU;

[0007] 2. The display and output module can only be simulated by ordinary input and output ports (IO), and the speed of CPU input and output ports (IO) is difficult to improve compared with CPLD and FPGA.

However, because the CPU and CPLD are connected by an external bus, and the speed of the CPU's external bus is very different from its internal bus speed, and a large amount of data needs to be exchanged between the CPU and CPLD in real time, the speed difference between the internal and external buses becomes the difference between CPU and CPLD. +A major technical bottleneck of CPLD / FPGA mode

In addition, because the above technical solution adds a CPLD / FPGA and a slice of RAM, the cost of the entire control system is greatly increased, which will not be conducive to its application and promotion.

Although the loading area of ​​the CPU+CPLD / FPGA mode has been greatly improved compared with the single CPU mode, when the CPU+CPLD / FPGA mode is applied to many ultra-wide or ultra-long screens, a single controller cannot complete its control, and multiple Controller cascade control

[0011] Therefore, for the current single processor (CPU) mode and CPU+CPLD / FPGA mode, it is impossible to meet the characteristics of parallel operation between modules and difficulty in improving the speed of the external bus

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