Power device with side stage protecting source and gate and manufacture method thereof

A power device and gate-source technology, applied in the field of microelectronics, can solve the problems of poor reliability, poor economy and practicability, and high product cost of VDMOS power devices, and achieve convenient manufacturing, strong economy and practicability, The effect of simple structure

Active Publication Date: 2013-07-10
SHENZHEN WINSEMI MICROELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In addition to the poor reliability of VDMOS power devices, the production process is complex and the product cost remains high, so the economy and practicability are poor.

Method used

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  • Power device with side stage protecting source and gate and manufacture method thereof
  • Power device with side stage protecting source and gate and manufacture method thereof

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0024] figure 1 is a schematic diagram of the internal structure of an embodiment of the present invention, figure 2 It is a process flow diagram of the present invention. Depend on figure 1 combine figure 2 It can be seen that the gate-source side platform protects the power device, which mainly includes a metal bottom layer 10 , a silicon wafer 8 , a thermally oxidized gate oxide layer 7 , a polysilicon layer 4 , a silicon dioxide layer 2 , and a thermally oxidized side platform 5 .

[0025] The silicon wafer 8 is used as a substrate layer to be thermally oxidized to grow a gate oxide layer 7 and a polysilicon layer 4, and a first silicon nitride layer 6 is grown under the polysilicon layer 4 as a protective layer under the polysilicon layer 4, and the polysilicon layer 4 acts as a gate conductive layer. Layer 31.

[0026] The silicon dioxide layer 2, the second silicon nitride layer 1 and the polysilicon layer 4 form a ring-shaped gate area, and the upper surface of t...

Embodiment 2

[0040] (1) Firstly, a layer of gate oxide layer is formed by thermal oxidation on the silicon wafer that has completed the conductive structure and terminal structure. The thermal oxidation temperature is 1000°, and the thickness of the gate oxide layer is 450 angstroms;

[0041] (2) On the gate oxide layer, a first silicon nitride layer is grown by deposition method as the lower protection layer of the polysilicon layer, and the thickness of the first silicon nitride layer is 650 angstroms;

[0042] (3) A polysilicon layer is grown as a gate electrode, and the thickness of the polysilicon layer is 10000 angstroms;

[0043] (4) The upper surface of the grown polysilicon layer is thermally oxidized to form a silicon dioxide layer, and the thickness of the silicon dioxide layer 2 is 5000 angstroms;

[0044] (5) A second silicon nitride layer is grown on the silicon dioxide layer as the upper protective layer of the polysilicon layer, and the thickness of the second silicon nitri...

Embodiment 3

[0050] (1) First, a gate oxide layer is formed by thermal oxidation on the silicon wafer that has completed the conductive structure and terminal structure. The thermal oxidation temperature is 1100°, and the thickness of the gate oxide layer is 600 angstroms;

[0051] (2) On the gate oxide layer, a first silicon nitride layer is grown by deposition method as the lower protection layer of the polysilicon layer, and the thickness of the first silicon nitride layer is 700 angstroms;

[0052] (3) A polysilicon layer is grown as a gate electrode, and the thickness of the polysilicon layer is 9500 angstroms;

[0053] (4) The upper surface of the grown polysilicon layer is thermally oxidized to form a silicon dioxide layer, and the thickness of the silicon dioxide layer 2 is 5500 angstroms;

[0054] (5) A second silicon nitride layer is grown on the silicon dioxide layer as the upper protective layer of the polysilicon layer, and the thickness of the second silicon nitride layer is 90...

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Abstract

Discloses are a power device with a side stage protecting a source and a gate and a manufacture method thereof. The power device comprises a metal base layer, a silicon chip, a gate oxide layer, a polysilicon layer, a thermal oxidation layer and a thermal oxidation side stage, wherein the silicon chip is thermally oxidized to form the gate oxide layer, a first silicon nitride layer is grown underthe polysilicon layer and used as a lower protecting layer of the polysilicon layer, and the polysilicon layer is used as a gate conductive layer; the upper surface of the polysilicon layer is thermally oxidized to form a silicon dioxide layer, and a second silicon nitride layer is grown on the silicon dioxide layer and used as an upper protecting layer of the polysilicon layer; and the side portion of the polysilicon layer is thermally oxidized to form a thermal oxidation side state isolating the source and the gate. The power device has the advantages of simple structure, convenience in manufacture, low cost and product assurance, the source and the gate can be effectively short-circuited by utilizing the characteristic that the oxidation rate of silicon nitride is far lower than that of silicon or polysilicon under the oxygen atmosphere, thus having excellent insulating property and greatly improving the manufacture yield.

Description

technical field [0001] The invention relates to the technical field of microelectronics, in particular to a power device with gate-source side platform protection and a manufacturing method thereof. Background technique [0002] The existing power device VDMOS is a gate voltage control device with multiple sub-inserts and conductive devices. It has the advantages of simple driving circuit, fast switching speed, and easy integration. The design of VDMOS is tens of thousands to millions of single packages connected in parallel to achieve the required current capability. For the VDMOS structure, the gate is added to the electrical signal through polysilicon conduction, and the source is added to the electrical signal through aluminum conduction. Insulation is required between the gate and the source, so that when the gate can apply a positive voltage signal to the source, the current from the source can pass through the channel to the drain to generate current. [0003] In th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/06H01L21/336H01L21/314
Inventor 王新
Owner SHENZHEN WINSEMI MICROELECTRONICS
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