Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

A chip fault detection method and device

A fault detection and chip technology, applied in measuring devices, measuring electrical variables, measuring current/voltage, etc., can solve problems affecting the normal operation of electronic products or electronic equipment

Active Publication Date: 2011-12-21
RUIJIE NETWORKS CO LTD
View PDF3 Cites 13 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Since in the above three schemes, it is necessary to detect the chip with the help of a special testing instrument, the prerequisite is that the electronic product or electronic equipment containing the chip to be tested needs to stop working, thus affecting the normal operation of the relevant electronic product or electronic equipment. run

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A chip fault detection method and device
  • A chip fault detection method and device
  • A chip fault detection method and device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0033] Such as image 3 As shown, it is a schematic diagram of the implementation flow of the chip fault detection method provided by the embodiment of the present invention, including the following steps:

[0034] S301. During the start-up process of the chip to be detected, when the actual power supply voltage value of the chip to be detected reaches a preset power supply voltage value, determine that this is a detection point;

[0035] S302. Detect whether the actual absorbed current value of the chip to be detected at this time is within the specified value range, if not, determine the detection point as a detection point that does not meet the conditions;

[0036]S303. When there is at least one detection point that does not satisfy the condition, determine that the chip to be detected is in a failure state.

[0037] During specific implementation, in order to ensure the accuracy of chip fault detection, multiple detection points may be selected for detection during the ...

Embodiment 2

[0048] In the embodiment of the present invention, a chip fault detection device is described.

[0049] Such as Figure 5 As shown, the structural diagram of the chip fault detection device provided for the implementation of the present invention includes a current conversion unit 501, a determination unit 502 and at least one detection unit 503, and the detection units 503 are connected in parallel, wherein:

[0050] A current conversion unit 501, configured to convert the actual power supply voltage value of the chip to be detected into an output actual sink current value;

[0051] Each detection unit 503 is used to determine that this time is a detection point when the actual power supply voltage value of the chip to be detected reaches the preset power supply voltage value during the start-up process of the chip to be detected; and detect that the chip to be detected is at this time Whether the actual absorption current value of the test is within the specified value rang...

Embodiment 3

[0055] In the embodiment of the present invention, the specific structure of the detection unit 503 is described.

[0056] Such as Figure 6 Shown is a schematic structural diagram of the detection unit 503, including: a first comparator 5031, a second comparator 5032, a third comparator 5033, a first flip-flop 5034, a second flip-flop 5035 and a determination module 5036, wherein:

[0057] The negative input terminal of the first comparator 5031 is connected with the constant voltage source, and receives the corresponding supply voltage value at the determined detection point; the positive input terminal of the first comparator 5031 is connected with the supply voltage value of the chip to be detected, for Receive the actual power supply voltage value of the chip to be detected; the output terminal of the first comparator 5031 is connected with the CLK pins of the first flip-flop 5034 and the second flip-flop 5035 respectively, for when the actual power supply voltage value o...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a method and device for detecting failures of a chip. The method and device disclosed by the invention are used for detecting whether the chip of an electronic product or electronic equipment is in a failure state or not under the premise that the electronic product or the electronic equipment is normally operated, wherein the method for detecting the failures of the chip comprises the following steps: when the actual power supply voltage value of the chip to be detected reaches the preset power supply voltage value, determining the moment as a detection point in the course of starting the chip to be detected; detecting whether the actual absorption current value of the chip to be detected at the moment is in the specified value range or not; if not, determining the detection point as a detection point which does not meet the conditions; and when at least one detection point which does not meet the conditions exists, judging that the chip to be detected is in the failure state.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a chip fault detection method and device. Background technique [0002] At present, electronic products or electronic devices contain a large number of chips, and the normal operation of electronic products or electronic devices depends on these chips. If a certain chip is in a faulty state during operation, it will affect the normal operation of electronic products or electronic equipment. In the prior art, the detection method for detecting whether a chip is in a fault state is as follows: first stop the operation of the electronic product or electronic equipment, take out the chip to be detected, and perform detection with the help of a special chip detection instrument. The judgment of whether the chip is in a fault state is mainly based on the starting current of the chip. This is because when the chip is working normally, the current during its starting process conf...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/26G01R19/165
Inventor 邓志吉
Owner RUIJIE NETWORKS CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products