The embodiments of the present invention provide a output buffer circuit, comprising: a first stage operational amplifying circuit configured as a differential input circuit; a second stage operational amplifying circuit configured as a
common source amplifying circuit having an
active load; and a feedback circuit provided between the first stage operational amplifying circuit and the second stage operational amplifying circuit and configured to have driving capability of providing source current and sink current alternately. By forming a unit
gain amplifier comprising the first stage operational amplifying circuit, the second stage operational amplifying circuit and the feedback circuit connected therebetween, the output buffer circuit has the driving capability of providing source current and sink current alternately. No special
voltage stabilizing circuit is needed, thus the circuit structure is simple and the
chip area is decreased; since the
power consumption can be reduced without a special
voltage stabilizing circuit, the fluctuation of the output
voltage is suppressed at the same time, the stability of the circuit is ensured in operation and offset is suppressed optimally, the output
signal is more accurate and the quality of image displayed is improved.