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Fuse structure and method for forming same

A fuse structure and fuse technology, applied in the manufacture of electrical components, electrical solid devices, semiconductor/solid devices, etc., can solve the problems of complex process, occupying COMS area, and small fusing current, so as to achieve simple forming process and chip saving Area and the effect of reducing manufacturing cost

Active Publication Date: 2014-03-12
XIAN YISHEN OPTOELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The first type of fuse structure directly uses the metal interconnection wire of the metal interconnection layer as the fuse, and uses laser to cut the fuse when repairing the circuit, so its cost is relatively high
The second type of fuse structure is in a programming circuit (one time programm, OTP), multiple programming circuit (multiple time programm, MTP) or electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, EEPROM) The fuse structure used in the device is not stacked with OTP / MTP / EEPROM devices, which wastes chip area, and the process is complicated, resulting in high cost.
The third fuse structure is a polysilicon fuse structure, which uses a polysilicon gate in a CMOS (Complementary Metal Oxide Semiconductor) process as a fuse. Since polysilicon has a large resistance, its fusing current is small and will not Destroy the related circuit structure, but it occupies the CMOS area, thus increasing the manufacturing cost of semiconductor devices
Yet, all do not solve the shortcoming that exists in the above-mentioned prior art

Method used

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  • Fuse structure and method for forming same
  • Fuse structure and method for forming same
  • Fuse structure and method for forming same

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Embodiment Construction

[0053] In the prior art, there is a fuse structure that uses polysilicon as a fuse. However, since the deposition temperature of polysilicon is above 600°C, it must be formed before the CMOS back-end process and is parallel to the CMOS circuit on the same plane. Therefore, the fuse structure It will occupy the area of ​​the chip and increase the cost. The inventor has repeatedly studied, hoping to find a fuse structure that can be formed after the CMOS back-end process and stacked on the CMOS circuit without occupying the chip area.

[0054] In the method for forming a fuse structure according to a specific embodiment of the present invention, after the circuit structure and the metal interconnection layer are formed, the interconnection structure of the fuse and the multi-fuse and the metal interconnection layer is formed on the metal interconnection layer.

[0055] In order to enable those skilled in the art to better understand the spirit of the present invention, the metho...

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Abstract

A fuse structure and a method for forming the same are provided. The method comprises the following steps: providing a semiconductor substrate (20) with a circuit structure formed on the semiconductor substrate (20) and a metal interconnection layer (22) formed on the circuit structure; and forming a fuse (33') on the metal interconnection layer (22) with an interconnection structure formed between the fuse (33') and the metal interconnection layer (22), wherein the fuse material is selected from polycrystalline germanium-silicon, polycrystalline germanium, amorphous silicon, amorphous germanium or amorphous germanium-silicon. Because the material of polycrystalline germanium-silicon, polycrystalline germanium, amorphous silicon, amorphous germanium or amorphous germanium-silicon has a high resistance, the required fusing current is low and the circuit structure can not be easily damaged. The chip area is reduced because the fuse structure is stacked on the metal interconnection layer.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a fuse structure. Background technique [0002] Semiconductor integrated circuits include fuse structures, which are usually used in both circuit repair and changing the output logic value of a memory. In terms of circuit repair, when the circuit is repaired, the fuse connected to the faulty circuit is blown to make the faulty circuit structure unusable, and the faulty circuit is replaced with a redundant circuit. In terms of changing the output logic value of the memory, the output logic value is determined by blowing or not blowing the fuse. [0003] There are several common fuse structures in the prior art. The first type of fuse structure directly uses the metal interconnection wire of the metal interconnection layer as the fuse, and the fuse is cut off by laser when the circuit is repaired, so its cost is relatively high. The second type of fus...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L23/525
CPCH01L23/5256H01L2924/0002
Inventor 毛剑宏
Owner XIAN YISHEN OPTOELECTRONICS TECH CO LTD