Power supply converter with controllable current peak inhibition protection

A technology for power converters and current peaks, which is applied in the direction of converting DC power input to DC power output, adjusting electrical variables, and controlling/regulating systems. Reduce the peak value of starting current, reduce the risk of failure, and improve reliability

Active Publication Date: 2012-03-07
MORNSUN GUANGZHOU SCI & TECH
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AI-Extracted Technical Summary

Problems solved by technology

But its disadvantage is: the degree of suppression of the peak value of the starting current is small, and it ob...
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Method used

Dual-tube drive control circuit 14, comprises resistance R111, electric capacity C12, PNP type triode TR3, resistance R6, NPN type triode TR2, electric capacity C5 and resistance R9, the base of NPN type triode TR2 passes through parallel capacitor C5 and The resistor R9 is respectively connected to the collector of the PNP transistor TR3 and the source of the MOS transistor TR1, the emitter of the NPN transistor TR2 is grounded, the collector of the NPN transistor TR2 is connected to the base of the PNP transistor TR3 through the resistor R6, and the PNP The base of the PNP transistor TR3 is connected to the emitter of the PNP transistor TR3 through the parallel resistor R111 and capacitor C12, and the emitter of the PNP transistor TR3 is connected to the gate of the MOS transistor TR1; the sampling sign...
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Abstract

The invention discloses a power supply converter with controllable current peak inhibition protection. According to the invention, a direct current input signal successively passes through an input filter circuit, a main power circuit and an output filter circuit and then the direct current input signal is output; after a voltage stabilizing circuit samples a direct current output signal, an output sampling signal carries out negative feedback control on a main switch tube in the main power circuit through a driving control circuit; a soft start circuit is arranged to connect between the input filter circuit and the driving control circuit; and an output short circuit protection circuit is arranged to connect a negative feedback winding of a transformer in the main power circuit and the driving control circuit. Besides, a current peak inhibition protection circuit is also arranged; an output terminal of the current peak inhibition protection circuit is connected to a joint between the voltage stabilizing circuit and the driving control circuit; and when the power supply converter is started, the current peak inhibition protection circuit outputs a monopulse signal that is used for replacing the voltage stabilizing circuit to work, wherein the amplitude and the time of the monopulse signal are controllable; and after the power supply converter works normally, the current peak inhibition protection circuit acts as being in a disconnection state.

Application Domain

Technology Topic

Short circuit protectionConstant power circuit +5

Image

  • Power supply converter with controllable current peak inhibition protection
  • Power supply converter with controllable current peak inhibition protection
  • Power supply converter with controllable current peak inhibition protection

Examples

  • Experimental program(1)

Example Embodiment

[0035] The common working principle of various switching power converters can be briefly described as: the DC input signal is input to the main power circuit through the input filter circuit, and after power conversion by the main power circuit, the DC output signal is output through the output filter circuit. The stabilized voltage is sampled by the stabilized voltage circuit, and the sampled signal is output to control the main switching tube in the main power circuit through the drive control circuit. The power converter can realize its soft start by adding a soft start circuit. Function, the power converter can also realize its protection function when the output is short-circuited by adding an output short-circuit protection circuit.
[0036] The above input filter circuit, main power circuit, output filter circuit, voltage stabilizing circuit, drive control circuit, soft start circuit and output short-circuit protection circuit can be composed of various circuit structures in the prior art according to their different design principles, thus forming A variety of DC-DC power converters with different functional structures, such as forward power converters, flyback power converters, chip-controlled PWM power converters and self-excited oscillation type RCC power converters, etc., and the present invention realizes current The technical measure of peak controllable suppression protection is implemented for the commonality of the above-mentioned various power converters, that is, the output terminal of the current peak suppression protection circuit is connected to the connection between the voltage stabilizing circuit and the drive control circuit, so the present invention The current peak suppression protection circuit is applicable to all switch-controlled DC-DC power converters, and the scope of protection of the present invention includes all switch-controlled DC-DC power converters that adopt the current peak suppression protection circuit of the present invention. The following will The working principle of the present invention is described by taking a specific configuration of a switch-controlled DC-DC power converter as an example.
[0037] like image 3 Shown is the schematic circuit diagram of Embodiment 1 of the present invention. The power converter described in Embodiment 1 includes: an input filter circuit 11, a soft start circuit 12, a main power circuit 13, an output filter circuit 16, a dual-tube drive control circuit 14, an output short circuit protection circuit 15, an error amplifier circuit 17 and an optocoupler OC1 A voltage stabilizing circuit and a current spike suppression protection circuit 18 are formed.
[0038] The input filter circuit 11 includes a filter capacitor C0, a filter capacitor C1, and a filter inductor L0. The filter capacitor C0, filter capacitor C1, and filter inductor L0 are connected to each other to form a closed loop. The connection point of the filter capacitor C0 and the filter capacitor C1 is grounded, and the filter capacitor The connection point of C0 and filter inductor L0 is the input end of the power converter, and the connection point of filter capacitor C1 and filter inductor L0 is the output end of the input filter circuit; the DC input signal is passed through the input filter circuit using the principle structure of the π-type filter circuit 11 Output after filtering.
[0039] The soft start circuit 12 includes a resistor R10, a diode D4, a resistor R13, a resistor R14 and a capacitor C9. The output terminal of the input filter circuit is grounded through the resistor R10, the diode D4, the resistor R13 and the resistor R14 in turn, wherein the anode of the diode D4 is connected to the resistor R10 Connected, the anode of diode D4 is grounded through capacitor C9, the connection between resistor R13 and resistor R14 is the output end of soft start circuit 12; the filter current output by input filter circuit 11 charges capacitor C9 through resistor R10, resistor R13 and resistor R14 The voltage on the voltage dividing capacitor C9, the value of the DC voltage signal GD-dc output by the output end of the soft start circuit 12 slowly rises as the capacitor C9 is charged, and reaches or exceeds the threshold voltage of the MOS tube after a time t=R10*C9, Realize the power-on soft start function.
[0040] The main power circuit 13 includes a transformer T1, an output rectifier diode D1, a MOS transistor TR1, a current limiting resistor R5, a voltage regulator tube Z4 and a capacitor C14. The output terminal of the MOS transistor TR1 is connected to the drain of the MOS transistor TR1, the source of the MOS transistor TR1 is grounded through the current limiting resistor R5, the drain of the MOS transistor TR1 is connected to the source of the MOS transistor TR1 through the capacitor C14, and the gate of the MOS transistor TR1 It is connected to the output end of the soft start circuit 12, the gate of the MOS transistor TR1 is connected to the cathode of the voltage regulator tube Z4, the anode of the voltage regulator tube Z4 is grounded, and the opposite end of the output winding P2 of the transformer T1 is connected to the anode of the output rectifier diode D1 The DC voltage signal GD-dc output by the soft start circuit 12 is stabilized by the voltage regulator tube Z4 and then input to the MOS tube TR1, so that the MOS tube TR1 is turned on, the main power circuit 13 starts to work, and the input filter circuit 11 The DC signal is converted into energy by the transformer T1 and then rectified by the rectifier diode D1. During this process, the capacitor C14 absorbs the leakage inductance energy of the transformer T1 to reduce the peak voltage of the MOS transistor TR1. In addition, the current limiting resistor R5 limits the flow through the MOS transistor. The value of the current sampling signal IS-s from the drain to source of TR1 generates a voltage drop on the current limiting resistor R5.
[0041] The output filter circuit 16 includes a filter capacitor C3, the filter capacitor C3 is connected between the cathode of the output rectifier diode D1 and the terminal of the same name of the output winding P2 of the transformer T1, and the two ends of the filter capacitor C3 are the output ends of the power converter; the main power The DC signal output by the circuit 13 is filtered by the capacitor C3 to output a DC output signal.
[0042] The output short-circuit protection circuit 15 includes the feedback winding P3 of the transformer T1, the diode D3, the resistor R1A, the resistor R1B, the capacitor C11, the capacitor C6 and the resistor R11. The gate of the tube TR1, the same-named end of the feedback winding P3 of the transformer T1 is connected to the cathode of the diode D3, the anode of the diode D3 is grounded, and the opposite-named end of the feedback winding P3 of the transformer T1 is grounded sequentially through the resistor R1A, the parallel resistor R1B and the capacitor C11; When the power converter is working normally, the feedback winding P3 obtains energy from the transformer T1, and charges the capacitor C11 through the resistor R1A, and the energy on the capacitor C11 can provide the working voltage for the subsequent circuit; when the output of the power converter is short-circuited, the subsequent circuit When disconnected, the voltage on the capacitor rises. At the same time, the resistor R1A absorbs the leakage inductance energy of the feedback winding P3, and the resistor R1B releases the energy on the capacitor C11. The two work together to quickly reduce the voltage on the capacitor C11, thereby reducing the gate of the MOS transistor TR1. pole potential, so that the MOS transistor TR1 is quickly turned off, thereby reducing the short-circuit loss of the power converter and playing the role of short-circuit protection.
[0043] The voltage stabilizing circuit includes an error amplifier circuit 17 and an optocoupler OC1, the input end of the error amplifier circuit 17 is connected to the output end of the power converter, the output end of the error amplifier circuit 17 is connected with the input pin of the optocoupler OC1, and the set of the optocoupler OC1 The electrode output pin is connected to the opposite end of the feedback winding P3 of the transformer T1 through the resistor R1, the emitter output pin of the optocoupler OC1 is connected to the base of the NPN transistor TR2, and the base of the NPN transistor TR2 is a voltage stabilizing circuit and drive control The junction of the circuit; the error amplifier circuit 17 samples the DC output signal, and the collector output pin of the optocoupler OC1 obtains the working voltage from the capacitor C11 through the resistor R1 and the resistor R1A. When the value of the DC output signal is too large, the optocoupler OC1 leads and output the sampling signal IS-1 at the emitter output.
[0044] The dual-tube drive control circuit 14 includes a resistor R111, a capacitor C12, a PNP transistor TR3, a resistor R6, an NPN transistor TR2, a capacitor C5 and a resistor R9, and the base of the NPN transistor TR2 passes through a capacitor C5 and a resistor R9 connected in parallel. Connected to the collector of PNP transistor TR3 and the source of MOS transistor TR1, the emitter of NPN transistor TR2 is grounded, the collector of NPN transistor TR2 is connected to the base of PNP transistor TR3 through resistor R6, and the PNP transistor TR3 The base of the PNP transistor TR3 is connected to the emitter of the PNP transistor TR3 through the resistor R111 and the capacitor C12 connected in parallel, and the emitter of the PNP transistor TR3 is connected to the gate of the MOS transistor TR1; the sampling signal IS-1 and the current sampling signal IS-s After the superposition, the NPN transistor TR2 and the PNP transistor TR3 are controlled to be turned on respectively by converting them into voltage signals, thereby lowering the gate potential of the MOS transistor TR1 and accelerating the turn-off of the MOS transistor TR1, so as to achieve the purpose of negative feedback.
[0045] The current spike suppression protection circuit 18 includes: resistor R1P, resistor R2P, capacitor C1P, PNP transistor T1P and diode D1P; the input terminal of the power converter is connected to the emitter of the PNP transistor T1P through the resistor R1P, and the input terminal of the power converter The base of the PNP transistor T1P is connected to the base of the PNP transistor T1P through the resistor R1P and the resistor R2P in turn. The cathode and anode of the diode D1P are respectively connected to the input terminal of the power converter and the base of the PNP transistor T1P. The base of the PNP transistor T1P passes through the capacitor C1P Grounded, the collector of the PNP transistor T1P is the output of the current spike suppression protection circuit and connected to the connection between the voltage regulator circuit and the drive control circuit, that is, the collector of the PNP transistor T1P is connected to the base of the NPN transistor TR2 .
[0046] The working principle of the current spike suppression protection circuit to provide controllable current spike suppression protection for the power converter can be divided into the following three stages:
[0047] The first stage: after the power converter is turned on, the voltage of the DC output signal rises from 0V to the rated value after the time t2, and the error amplifier circuit 17 does not work temporarily during the period of output voltage rise, that is, the optocoupler OC1 is disconnected; and At the same time, in the current spike suppression protection circuit 18, the DC input signal charges the capacitor C1P through the resistors R1P and R2P. At this time, the emitter potential of the PNP transistor T1P is higher than the base potential, and the PNP transistor T1P is turned on. The collector of the triode T1P outputs a single pulse signal IS-2, which is superimposed with the current sampling signal IS-s flowing through the resistor R5 and converted into a voltage signal to jointly control the conduction of the NPN transistor TR2 and the PNP transistor TR3, thereby pulling down the MOS The gate potential of the tube TR1 is equivalent to replacing the work of the voltage stabilizing circuit, realizing the function of negative feedback compensation, effectively reducing the requirements for the current signal of the power transformer at the moment of starting up, and reducing the conduction time of the MOS transistor TR1 at the moment of starting up. This reduces input current spikes.
[0048] After the rising time t2, the voltage stabilizing circuit starts to work, and the power converter enters the normal working state.
[0049] The second stage: After the time t1=(R1P+R2P)*C1P, the capacitor C1P is fully charged, and the current flowing through the resistor R2P is zero at this time, the PNP transistor T1P is cut off, and its collector outputs a low level, and the current peak is suppressed The protection circuit is equivalent to an open circuit to the base of the NPN transistor TR2.
[0050] By adjusting the appropriate resistor R1P, resistor R2P and capacitor C1P to make the time t1 meet the condition: t1>t2, the single pulse signal IS-2 can effectively replace the sampling signal IS-1 to ensure that the input current peak value of the power converter is small at the moment of power-on It can still quickly turn off the MOS transistor TR1, and finally realize the smooth rise of the input current of the power converter (see Figure 22 ).
[0051] The third stage: when the power converter is shut down, the energy stored on the capacitor C1P is released through the diode D1 to ensure that the capacitor C1P is at a low potential when the power converter is restarted, that is, the current spike suppression protection circuit 18 is automatically reset when the power converter is shut down .
[0052] The core idea of ​​the present invention is: when the power converter is started, use the current peak suppression protection circuit to generate a single pulse signal with controllable amplitude and time, replace the sampling signal IS-1 with this single pulse signal, and quickly turn off the signal through the driving control circuit Cut off the MOS transistor TR1 to reduce the input current peak. At the same time, the current peak suppression protection circuit is automatically disconnected when the power converter is working normally, and the current peak suppression protection circuit can be automatically reset when the power converter is turned off.
[0053] The working principle of the controllable current peak suppression protection of the power converter in the following embodiment is the same as that of the first embodiment, the difference is only in the circuit configuration of the current peak suppression protection circuit, so the following embodiment only illustrates the current peak in the power converter The circuit composition and principle of the suppression protection circuit, the connection mode of the output terminal of the current peak suppression protection circuit is the same as that of the output terminal of the current peak suppression protection circuit 11 described in Embodiment 1, and the following will be based on the difference in the composition principle of the current peak suppression protection circuit Divided into three ideas to illustrate, each idea has several specific connection methods with different advantages:
[0054] The first idea is to use the current amplification effect of the triode to realize the generation of the single pulse signal and control the period of the single pulse signal through the capacitor:
[0055] like Figure 4 As shown, it is a schematic circuit diagram of the current peak suppression protection circuit in the second embodiment of the present invention. In this embodiment, the composition of the current peak suppression protection circuit A1 is basically the same as that of the current peak suppression protection circuit 18 in Embodiment 1, the difference is that the resistance R3-2 is added, and the collector connection resistance R3 of the PNP transistor T1P One end of -2 and the other end of the resistor R3-2 are the output ends of the current spike suppression protection circuit. The working principle of the second embodiment is the same as that of the current peak suppression protection circuit in the first embodiment, the only difference is that the resistor R3-2 can adjust the signal strength of the single pulse signal IS-2 output from the output terminal of the current peak suppression protection circuit.
[0056] like Figure 5 As shown, it is a schematic circuit diagram of the current peak suppression protection circuit in the third embodiment of the present invention. In this embodiment, the composition of the current peak suppression protection circuit A2 is basically the same as that of the current peak suppression protection circuit 18 in Embodiment 1. The difference is that the resistor R3-2 is added, and the input terminal of the power converter passes through the resistor R1P in turn. And the resistor R3-2 is connected to the emitter of the PNP transistor T1P. The working principle of the third embodiment is the same as that of the current peak suppression protection circuit in the first embodiment, the only difference is that the resistor R3-2 can adjust the signal strength of the single pulse signal IS-2 output from the output terminal of the current peak suppression protection circuit.
[0057] like Image 6 As shown, it is a schematic circuit diagram of the current peak suppression protection circuit in Embodiment 4 of the present invention. In this embodiment, the composition of the current spike suppression protection circuit A3 is basically the same as that of the current spike suppression protection circuit 18 in Embodiment 1, the difference is that the resistor R3-2 is added, and the input terminal of the power converter passes through the resistor R1P in turn. and the resistor R3-2 are connected to the emitter of the PNP transistor T1P; the cathode of the diode D1P is connected to the input terminal of the power converter through the resistor R1P. The working principle of the fourth embodiment is the same as that of the current peak suppression protection circuit in the first embodiment, the only difference is that the resistor R3-2 can adjust the signal strength of the single pulse signal IS-2 output from the output terminal of the current peak suppression protection circuit, and the capacitor C1P The stored charge is discharged through diode D1P and resistor R1P.
[0058] like Figure 7As shown, it is a schematic circuit diagram of the current peak suppression protection circuit in Embodiment 5 of the present invention. In this embodiment, the composition of the current spike suppression protection circuit A4 is basically the same as that of the current spike suppression protection circuit 18 in Embodiment 1, the difference is that the cathode of the diode D1P is connected to the input terminal of the power converter through the resistor R1P. The working principle of the fifth embodiment is the same as that of the current spike suppression protection circuit in the first embodiment, the only difference is that the charge stored on the capacitor C1P is discharged through the diode D1P and the resistor R1P.
[0059] like Figure 8 As shown, it is a schematic circuit diagram of the current peak suppression protection circuit in Embodiment 6 of the present invention. In this embodiment, the composition of the current peak suppression protection circuit A5 is basically the same as that of the current peak suppression protection circuit 18 in Embodiment 1, the difference is that the resistance R3-2 is added, and the collector connection resistance R3 of the PNP transistor T1P One end of -2 and the other end of the resistor R3-2 are the output end of the current spike suppression protection circuit; the cathode of the diode D1P is connected to the input end of the power converter through the resistor R1P. The working principle of the sixth embodiment is the same as that of the current peak suppression protection circuit in the first embodiment, the only difference is that the resistor R3-2 can adjust the signal strength of the single pulse signal IS-2 output from the output terminal of the current peak suppression protection circuit, and the capacitor C1P The stored charge is discharged through diode D1P and resistor R1P.
[0060] like Figure 9 As shown, it is a schematic circuit diagram of the current peak suppression protection circuit in Embodiment 7 of the present invention. In this embodiment, the composition of the current spike suppression protection circuit A6 is basically the same as that of the current spike suppression protection circuit 18 in Embodiment 1, the difference is that a resistor R3P is added, and the anode of the diode D1P is connected to the PNP transistor through the resistor R3P The base of T1P, the base of PNP transistor T1P is grounded through resistor R3P and capacitor C1P in turn. Embodiment 7 has the same working principle as that of the current peak suppression protection circuit in Embodiment 1, the only difference being that the added resistor R3P can adjust the amplitude of the single pulse signal IS-2 output from the output terminal of the current peak suppression protection circuit.
[0061] like Figure 10 As shown, it is a schematic circuit diagram of the current peak suppression protection circuit in the eighth embodiment of the present invention. In this embodiment, the composition of the current peak suppression protection circuit A7 is basically the same as that of the current peak suppression protection circuit 18 in Embodiment 1, the difference is that the resistor R3P and the resistor R3-2 are added, and the anode of the diode D1P passes through the resistor R3P Connected to the base of the PNP transistor T1P, the base of the PNP transistor T1P is grounded through the resistor R3P and the capacitor C1P in turn; the input terminal of the power converter is connected to the emitter of the PNP transistor T1P through the resistor R1P and the resistor R3-2 in turn . The working principle of the eighth embodiment is the same as that of the current peak suppression protection circuit in the first embodiment, the difference is that the increased resistance R3P can adjust the amplitude of the single pulse signal IS-2 output from the output terminal of the current peak suppression protection circuit, and the increased resistance R3 -2 can adjust the signal strength of the single pulse signal IS-2 output from the output terminal of the current peak suppression protection circuit.
[0062] like Figure 11 As shown, it is a schematic circuit diagram of the current peak suppression protection circuit in Embodiment 9 of the present invention. In this embodiment, the composition of the current peak suppression protection circuit A8 is basically the same as that of the current peak suppression protection circuit 18 in Embodiment 1, the difference is that the resistor R3P and the resistor R3-2 are added, and the anode of the diode D1P passes through the resistor R3P Connected to the base of the PNP transistor T1P, the base of the PNP transistor T1P is grounded through the resistor R3P and the capacitor C1P in turn; the collector of the PNP transistor T1P is connected to one end of the resistor R3-2, and the other end of the resistor R3-2 is the current Spike suppression protects the output of the circuit. Embodiment 9 has the same working principle as that of the current peak suppression protection circuit in Embodiment 1, the only difference is that the increased resistance R3P can adjust the amplitude of the single pulse signal IS-2 output from the output terminal of the current peak suppression protection circuit, and the increased resistance R3 -2 can adjust the signal strength of the single pulse signal IS-2 output from the output terminal of the current peak suppression protection circuit.
[0063] like Figure 12 As shown, it is the circuit principle diagram of the current peak suppression protection circuit in the tenth embodiment of the present invention; in this embodiment, the current peak suppression protection circuit A9 is basically the same as the current peak suppression protection circuit 18 in the first embodiment. The point is: the resistor R3P and the resistor R3-2 are added, the anode of the diode D1P is connected to the base of the PNP transistor T1P through the resistor R3P, and the base of the PNP transistor T1P is grounded through the resistor R3P and the capacitor C1P in turn; the PNP transistor T1P The collector of the diode D1P is connected to one end of the resistor R3-2, and the other end of the resistor R3-2 is the output end of the current spike suppression protection circuit; the cathode of the diode D1P is connected to the input end of the power converter through the resistor R1P. Embodiment 10 has the same working principle as that of the current peak suppression protection circuit in Embodiment 1, the difference is that the increased resistance R3P can adjust the amplitude of the single pulse signal IS-2 output from the output terminal of the current peak suppression protection circuit, and the increased resistance R3 -2 can adjust the signal strength of the single pulse signal IS-2 output from the output terminal of the current spike suppression protection circuit, and the charge stored on the capacitor C1P is released through the diode D1P and the resistor R1P.
[0064] like Figure 13 As shown, it is a schematic circuit diagram of the current peak suppression protection circuit in the eleventh embodiment of the present invention. In this embodiment, the composition of the current peak suppression protection circuit A10 is basically the same as that of the current peak suppression protection circuit 18 in Embodiment 1, the difference is that the resistor R3P and the resistor R3-2 are added, and the anode of the diode D1P passes through the resistor R3P Connected to the base of the PNP transistor T1P, the base of the PNP transistor T1P is grounded through the resistor R3P and the capacitor C1P in turn; the input terminal of the power converter is connected to the emitter of the PNP transistor T1P through the resistor R1P and the resistor R3-2 in turn ; The cathode of the diode D1P is connected to the input terminal of the power converter through the resistor R1P. The operating principle of the current peak suppression protection circuit in the eleventh embodiment is the same as that in the first embodiment, the only difference is that the increased resistance R3P can adjust the amplitude of the single pulse signal IS-2 output from the output terminal of the current peak suppression protection circuit, and the increased resistance R3-2 can adjust the signal intensity of the single pulse signal IS-2 output from the output terminal of the current spike suppression protection circuit, and the charge stored on the capacitor C1P is released through the diode D1P and the resistor R1P.
[0065] like Figure 14 As shown, it is a schematic circuit diagram of the current spike suppression protection circuit in Embodiment 12 of the present invention. In this embodiment, the composition of the current spike suppression protection circuit A10 is basically the same as that of the current spike suppression protection circuit 18 in Embodiment 1, the difference is that a resistor R3P is added, and the anode of the diode D1P is connected to the PNP transistor through the resistor R3P The base of T1P, the base of PNP transistor T1P is grounded through resistor R3P and capacitor C1P in turn; the cathode of diode D1P is connected to the input terminal of the power converter through resistor R1P. Embodiment 12 is the same as the working principle of the current peak suppression protection circuit in Embodiment 1, the difference is only that the added resistance R3P can adjust the amplitude of the single pulse signal IS-2 output from the output terminal of the current peak suppression protection circuit, and the capacitor C1P The stored charge is discharged through diode D1P and resistor R1P.
[0066] The second way of thinking is to use the current amplification effect of the operational amplifier to realize the generation of the single pulse signal and control the period of the single pulse signal through the capacitor:
[0067] like Figure 15 As shown, it is a schematic circuit diagram of the current peak suppression protection circuit in Embodiment 13 of the present invention. The current spike suppression protection circuit A12 includes a resistor R1-13, a regulator tube Z1-13, a resistor R2-13, a resistor R3-13, a capacitor C1-13, a resistor R4-13, a resistor R5-13, an operational amplifier LM-13 and Resistor R6-13; the input terminal of the power transformer is connected to the cathode of the voltage regulator tube Z1-13 through the resistor R1-13, the anode of the voltage regulator tube Z1-13 is grounded, and the cathode of the voltage regulator tube Z1-13 passes through the resistor R2-13 in turn Ground the resistance R3-13, the connection point of the resistance R2-13 and the resistance R3-13 is connected with the non-inverting input terminal of the operational amplifier LM-13, and the cathode of the regulator tube Z1-13 passes through the resistance R4-13 and the capacitance C1- 13 is grounded, the connection point of the resistor R4-13 and the capacitor C1-13 is connected to the inverting input terminal of the operational amplifier LM-13, the resistor R5-13 is connected in parallel with the capacitor C1-13, and the positive pole of the operational amplifier LM-13 is connected to the The cathodes of the Zener tube Z1-13 are connected, the negative pole of the power supply of the operational amplifier LM-13 is grounded, the output terminal of the operational amplifier LM-13 is connected to one end of the resistor R6-13, and the other end of the resistor R6-13 is a current spike suppression protection circuit output terminal.
[0068] Its working principle can be divided into the following three stages:
[0069] The first stage: After the power converter is turned on, within the output voltage rise time t2, the DC input signal is stabilized by the voltage regulator tube Z1-13 and then outputs a stable voltage. The stable voltage is divided by the resistors R2-13 and R3-13 The voltage effect makes the non-inverting input terminal of the operational amplifier LM-13 quickly obtain a high potential, and the stable voltage slowly charges the capacitor C1-13 through the resistor R4-13, so that the potential of the inverting input terminal of the operational amplifier LM-13 rises slowly, and the operational amplifier The working voltage of LM-13 is provided by the stable voltage. At this time, the operational amplifier LM-13 outputs a high level, and the output terminal of the current spike suppression protection circuit outputs a single pulse signal IS-2 during the rising time t2.
[0070] The second stage: After the charging time t1 of the capacitor C1-13, the capacitor C1-13 is fully charged, the potential of the inverting input terminal of the operational amplifier LM-13 rises to a high level, and the operational amplifier LM-13 outputs a low level. During the charging time After t1, the output terminal of the current peak suppression protection circuit outputs a low level, and the current peak suppression protection circuit is equivalent to disconnecting the base of the NPN transistor TR2.
[0071] By debugging the appropriate resistor R1-13, resistor R2-13, resistor R3-13, resistor R4-13 and capacitor C1-13, the time t1 can meet the condition: t1>t2, and the single pulse signal of the required period can be obtained; By adjusting the resistors R1-13 and R6-13 reasonably, a single pulse signal with the required output level and amplitude can be obtained.
[0072] The third stage: when the power converter is shut down, the energy stored on the capacitor C1-13 is released through the resistor R5-13 to ensure that the capacitor C1-13 is at a low potential when the power converter is restarted, that is, the current spike suppression protection circuit A12 is in the power supply Automatic reset when the converter is turned off.
[0073] like Figure 16 As shown, it is a schematic circuit diagram of the current peak suppression protection circuit in Embodiment 14 of the present invention. In this embodiment, the composition of the current peak suppression protection circuit A13 is basically the same as that of the current peak suppression protection circuit A12 in the thirteenth embodiment, and the difference is that there is no resistor connected in parallel with the capacitor C1-13. The working principle of the current spike suppression protection circuit in Embodiment 14 and Embodiment 13 is the same, and the difference is that the resistor R5-13 is removed. Compared with Embodiment 13, its advantage is that it can reduce the current spike. ; Compared with Embodiment 13, its disadvantage is that when the power supply is restarted rapidly and repeatedly, the output pulse cycle is changed, and the controllability of the single pulse signal becomes poor.
[0074] like Figure 17 As shown, it is a schematic circuit diagram of the current peak suppression protection circuit in Embodiment 15 of the present invention. In this embodiment, the composition of the current peak suppression protection circuit A14 is basically the same as that of the current peak suppression protection circuit A13 in Embodiment 14, the difference is that it also includes a diode D1-13; a resistor R4-13 and a capacitor C1-13 The connection point of is connected to the anode of the diode D1-13, and the cathode of the diode D1-13 is connected to the input terminal of the power converter. The working principle of the current spike suppression protection circuit in Embodiment 15 and Embodiment 14 is the same, the only difference is that the diode D1-13 is added, and the charge stored on the capacitor C1-13 is released through the diode D1-13.
[0075]The third way of thinking is to use the current amplification effect of the same type of triode in series to realize the generation of single pulse signal and control the period of single pulse signal through capacitance:
[0076] like Figure 18 Shown is a schematic circuit diagram of the current spike suppression protection circuit in Embodiment 16 of the present invention. Current spike suppression protection circuit A15 includes resistor R0-16, diode D2-16, resistor R4-16, capacitor C1-16, resistor R2-16, resistor R3-16, resistor R1-16, NPN transistor T1-16, NPN type transistor T2-16 and diode D1-16; the input terminal of the power converter is grounded through the resistor R0-16, resistor R2-16 and resistor R3-16 in turn, and the connection point of the resistor R2-16 and the resistor R3-16 is connected to the NPN type The bases of the transistor T1-16 are connected, and the input terminal of the power converter is grounded through the resistor R0-16, the resistor R4-16, and the capacitor C1-16 in turn, and the connection points of the resistor R4-16 and the capacitor C1-16 are respectively connected to the NPN type The base of the transistor T2-16 is connected to the anode of the diode D2-16, the cathode of the diode D2-16 is connected to the input terminal of the power converter, and the collector of the NPN transistor T1-16 passes through the resistor R1-16 and the resistor R0- 16 is connected to the input terminal of the power converter, the emitter of the NPN transistor T2-16 is grounded, the emitter of the NPN transistor T1-16 is connected to the collector of the NPN transistor T2-16, and its connection point is connected to the diode D1- The anodes of the diodes D1-16 are connected to each other, and the cathodes of the diodes D1-16 are the output ends of the current spike suppression protection circuit.
[0077] Its working principle can be divided into the following three stages:
[0078] The first stage: After the power converter is turned on, within the output voltage rise time t2, the DC input signal passes through the voltage division of the resistors R0-16, R2-16 and R3-16 to make the base of the NPN transistor T1-16 The high potential is quickly obtained, and the NPN transistor T1-16 is turned on. At the same time, the DC input signal charges the capacitor C1-16 through the resistor R0-16 and the resistor R4-16, so that the base potential of the NPN transistor T2-16 increases with At this time, the NPN transistor T2-16 is cut off, the diode D1-16 outputs a high level, and the output terminal of the current peak suppression protection circuit outputs a single pulse signal IS-2 during the rising time t2.
[0079] The second stage: After the capacitor C1-16 is charged for t1, the capacitor C1-16 is fully charged, the base potential of the NPN transistor T2-16 rises to a high level, the NPN transistor T2-16 is turned on, and the diode D1-16 outputs Low level, the current peak suppression protection circuit is equivalent to an open circuit to the base of the NPN transistor TR2.
[0080] By adjusting the appropriate resistor R4-16, capacitor C1-16, resistor R3-16, and resistor R2-16, the time t1 can meet the condition: t1>t2, and the single pulse signal of the required period can be obtained; by adjusting the resistor R1 reasonably -16 and resistance R0-16 can get the single pulse signal of required output level amplitude.
[0081] The third stage: when the power converter is shut down, the energy stored on the capacitor C1-16 is released through the diode D2-16 to ensure that the capacitor C1-16 is at a low potential when the power converter is restarted, that is, the current spike suppression protection circuit A15 is in the power supply Automatic reset when the converter is turned off.
[0082] like Figure 19 Shown is a schematic circuit diagram of the current spike suppression protection circuit in Embodiment 17 of the present invention. Current spike suppression protection circuit A16 includes resistor R0-16, diode D2-16, resistor R4-16, capacitor C1-16, resistor R2-16, resistor R3-16, resistor R1-16, NPN transistor T1-16, NPN type transistor T2-16 and diode D1-16; the input terminal of the power converter is grounded through the resistor R0-16, resistor R2-16 and resistor R3-16 in turn, and the connection point of the resistor R2-16 and the resistor R3-16 is connected to the NPN type The bases of the transistor T1-16 are connected, and the input terminal of the power converter is grounded through the resistor R0-16, the resistor R4-16, and the capacitor C1-16 in turn, and the connection points of the resistor R4-16 and the capacitor C1-16 are respectively connected to the NPN type The base of the transistor T2-16 is connected to the anode of the diode D2-16, the cathode of the diode D2-16 is connected to the input terminal of the power converter, and the collector of the NPN transistor T1-16 is connected to the power converter through the resistor R0-16 The input terminal of the NPN transistor T2-16 is grounded, the emitter of the NPN transistor T1-16 is connected to the collector of the NPN transistor T2-16, and the connection point is connected to the diode D1-16 through the resistor R1-16 The anode of the diode D1-16 is connected, and the cathode of the diode D1-16 is the output end of the current spike suppression protection circuit. The working principle of the current peak suppression protection circuit in the seventeenth embodiment is the same as that in the sixteenth embodiment, and the difference is only in the position change of the resistor R1-16.
[0083] like Figure 20 Shown is a schematic circuit diagram of the current spike suppression protection circuit in Embodiment 18 of the present invention. Current spike suppression protection circuit A17 includes resistor R0-16, resistor R5-18, resistor R4-16, capacitor C1-16, resistor R2-16, resistor R3-16, resistor R1-16, NPN transistor T1-16, NPN type transistor T2-16 and diode D1-16; the input terminal of the power converter is grounded through the resistor R0-16, resistor R2-16 and resistor R3-16 in turn, and the connection point of the resistor R2-16 and the resistor R3-16 is connected to the NPN type The bases of the transistor T1-16 are connected, the input terminal of the power converter is grounded through the resistor R0-16, the resistor R4-16 and the capacitor C1-16 in turn, and the connection point of the resistor R4-16 and the capacitor C1-16 is connected to the NPN transistor The base of T2-16 is connected, the resistor R5-18 is connected in parallel with the capacitor C1-16, the cathode of the diode D2-16 is connected to the input terminal of the power converter, and the collector of the NPN transistor T1-16 is connected through the resistor R0-16 To the input terminal of the power converter, the emitter of the NPN transistor T2-16 is grounded, and the emitter of the NPN transistor T1-16 is connected to the collector of the NPN transistor T2-16. The anodes of the diodes D1-16 are connected to each other, and the cathodes of the diodes D1-16 are the output terminals of the current peak suppression protection circuit. The working principle of the current spike suppression protection circuit in Embodiment 18 and Embodiment 17 is the same, the only difference is that the diode D2-16 is removed, and the charge stored on the capacitor C1-16 is released through the resistor R5-18.
[0084] like Figure 21 As shown, under the conditions of temperature: 25 degrees, input voltage: 4.5V and output load: 1.2A, test the input current waveform diagram of the existing model WRB0505ZP-6W switching power converter starting up (equivalent to the test book The starting current on the resistor R5 in the main power circuit of the invention); from its input current waveform, it can be seen that the starting current of the power converter has a higher peak value when it is started.
[0085] like Figure 22 As shown, the test model is WRB0505ZP-6W switching power supply under the conditions of temperature: 25 degrees, input voltage: 4.5V and output load: 1.2A, and connected to the current peak suppression protection circuit 18 described in Embodiment 1 of the present invention. The input current wave form diagram (equivalent to testing the start-up current on the resistance R5 in the main power circuit of the present invention) of converter start-up, wherein, in current spike suppression protection circuit 18, diode D1P adopts bas16 diode, resistance R1P takes The value is 1.2K ohms, the value of resistor R2P is 200K ohms, and the value of capacitor C1P is 1uf. PNP transistor T1P adopts PNP triode 3906; it can be seen from its input current waveform Figure 21 Due to the addition of the current peak suppression protection circuit 18, the peak voltage is reduced by 0.195V, the peak current is reduced by 1.7A, the peak value of the starting current is greatly reduced, the input current can rise smoothly, and the risk of resistor failure is reduced, thereby improving the power converter. reliability.
[0086] Under the above conditions, using the current peak suppression protection circuit described in Embodiment 2 to Embodiment 18 of the present invention can also obtain the same Figure 22 Similar experimental results are not shown one by one.
[0087] In addition to the several implementation circuits described above, those skilled in the industry can naturally think of other equivalent application solutions through the above description and accompanying drawings. It should be noted that the descriptions of the above embodiments are only used to help understand the present invention. For those of ordinary skill in the art, on the premise of not departing from the principles of the present invention, using other single-pulse circuits for compensation or making some improvements and modifications falls within the protection scope of the claims of the present invention.
[0088] The above only introduces the application of the single-pulse compensation principle in the self-oscillating flyback converter. This principle is also applicable to all switch-controlled DC-DC conversion power supplies, including forward and flyback circuits; the driving mode includes chip control type ( PWM) and self-oscillating RCC circuits. Therefore, for all switch-controlled DC-DC conversion power supplies, the introduction of the present invention for current peak suppression protection falls within the protection scope of the claims of the present invention.
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the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
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