Segment parallel coding method of feedforward convolutional code

Abstract

The invention provides a segment parallel coding method of a feedforward convolutional code. The method is characterized in that: carrying out parallel coding on input information bit sequence by a plurality of serial feedforward convolution encoders, carrying out segmentation on an input information bit sequence to be coded, respectively applying a serial feedforward convolution encoder to code each segment of the information bit sequence, wherein, each segment of the information bit sequence is named as a block, in segmenting, overlapping bits, or after coding, inputting full 0 bits for supplement, generating overlap, according to an overlapped part, connecting code results of each serial feedforward convolution encoder in series, and taking the results as final output of parallel feedforward convolution coding. According to the invention, based on information sequence blocking, a characteristic of a feedforward convolution encoder is fully utilized, resource occupation and power consumption are reduced, and coding throughput is raised.

Description

technical field

[0001] The invention relates to the technical field of communication, in particular to communication using feedforward convolutional coding, and is a segmented parallel coding method of feedforward convolutional coding. Background technique

[0002] A feed-forward convolutional encoder is a linear finite-state system that serially receives input information bits, processes them and outputs encoded bits serially. There is no feedback connection inside the feed-forward convolutional encoder, and its impulse response is finite. An example of a conventional feed-forward convolutional encoder is in figure 1 shown in . The throughput of the feed-forward convolutional encoder depends on the system clock rate, and the encoding process takes a long time when the length of the information bit sequence is large. Finding an algorithm to increase the throughput of feed-forward convolutional encoders is of interest for increasingly high-speed applications.

[0003] Amo...

Examples

Embodiment 1

[0026] This embodiment corresponds to technical solution 1, and the corresponding structure diagram is image 3 .

[0027] Selection of the corresponding serial feedforward convolutional encoder in this embodiment figure 1 The packet with a bit length of L is divided into 4 smaller blocks, which are called blocks 1–4 in this article. Block 1 contains L / 4 bits, and other blocks contain L / 4+2 bits. Two bits overlap between block 1 and block 2, block 2 and block 3, and block 3 and block 4.

[0028] Configure the initial state of each serial feedforward convolutional encoder before encoding: the initial state of the serial feedforward convolutional encoder of block 1 is known, and the serial feedforward convolutional encoders of block 2, 3, and 4 are known. The initial state of is set to all 0s.

[0029] Each block is independently coded in parallel by a serial feedforward convolutional encoder.

[0030] The first two input bits of blocks 2, 3, and 4 are the same as the last two input bi...

Embodiment 2

[0032] This embodiment corresponds to technical solution 2, and the corresponding structure diagram is Figure 4 .

[0033] In this embodiment, a packet with a bit length of L is divided into 4 smaller blocks, called blocks 1-4, and each block contains L / 4 bits. Selection of the corresponding serial feedforward convolutional encoder in this embodiment figure 1 Structure.

[0034] Each block is independently coded in parallel by a serial feedforward convolutional encoder. Configure the initial state of each serial feedforward convolutional encoder before encoding: the initial state of the serial feedforward convolutional encoder of block 1 is known, and the serial feedforward convolutional encoders of block 2, 3, and 4 are known. The initial state of is set to all 0s.

[0035] The serial feedforward convolutional encoders of each block work independently and in parallel, and the encoding is completed in L / 4 clock cycles. In the input of the serial feedforward convolutional encoder ...

technical field

[0001] The invention relates to the technical field of communication, in particular to communication using feedforward convolutional coding, and is a segmented parallel coding method of feedforward convolutional coding. Background technique

[0002] A feed-forward convolutional encoder is a linear finite-state system that serially receives input information bits, processes them and outputs encoded bits serially. There is no feedback connection inside the feed-forward convolutional encoder, and its impulse response is finite. An example of a conventional feed-forward convolutional encoder is in figure 1 shown in . The throughput of the feed-forward convolutional encoder depends on the system clock rate, and the encoding process takes a long time when the length of the information bit sequence is large. Finding an algorithm to increase the throughput of feed-forward convolutional encoders is of interest for increasingly high-speed applications.

[0003] Amo...

Examples

Embodiment 1

[0026] This embodiment corresponds to technical solution 1, and the corresponding structure diagram is image 3 .

[0027] Selection of the corresponding serial feedforward convolutional encoder in this embodiment figure 1 The packet with a bit length of L is divided into 4 smaller blocks, which are called blocks 1–4 in this article. Block 1 contains L / 4 bits, and other blocks contain L / 4+2 bits. Two bits overlap between block 1 and block 2, block 2 and block 3, and block 3 and block 4.

[0028] Configure the initial state of each serial feedforward convolutional encoder before encoding: the initial state of the serial feedforward convolutional encoder of block 1 is known, and the serial feedforward convolutional encoders of block 2, 3, and 4 are known. The initial state of is set to all 0s.

[0029] Each block is independently coded in parallel by a serial feedforward convolutional encoder.

[0030] The first two input bits of blocks 2, 3, and 4 are the same as the last two input bi...

Embodiment 2

[0032] This embodiment corresponds to technical solution 2, and the corresponding structure diagram is Figure 4 .

[0033] In this embodiment, a packet with a bit length of L is divided into 4 smaller blocks, called blocks 1-4, and each block contains L / 4 bits. Selection of the corresponding serial feedforward convolutional encoder in this embodiment figure 1 Structure.

[0034] Each block is independently coded in parallel by a serial feedforward convolutional encoder. Configure the initial state of each serial feedforward convolutional encoder before encoding: the initial state of the serial feedforward convolutional encoder of block 1 is known, and the serial feedforward convolutional encoders of block 2, 3, and 4 are known. The initial state of is set to all 0s.

[0035] The serial feedforward convolutional encoders of each block work independently and in parallel, and the encoding is completed in L / 4 clock cycles. In the input of the serial feedforward convolutional encoder ...

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