Concurrent processing method and device for data packet

Abstract

The present invention relates to a concurrent processing method and device for a data packet. The method comprises the steps of: using at least two one-way idle linked lists for storing idle addresses of a shared storage in an address pool which is used for storing all the idle addresses in the shared storage; obtaining the message type of the shared storage and establishing a corresponding address first-in first-out queue FIFO according to the message type of the shared storage; and respectively providing an idle address which is to be written into the shared storage for at least two messages, and updating the corresponding addresses of the at least two messages to the corresponding address FIFO by the at least one-way idle linked lists when the at least two messages which are to be written into the shared storage at the same time are received. The realization of the technical scheme can solve the problem in the prior arts that the shared storage can not realize reading and writting of two messages at the same time.

Description

technical field [0001] The present invention relates to the field of computer technology, and more specifically, to a method and device for concurrently processing data packets. Background technique [0002] At present, in the design of ASIC (Application Specific Integrated Circuit) or FPGA (Field-Programmable Gate Array, Field Programmable Gate Array), it is often necessary to process data packets specified by various protocols. Generally, there are two common features: one is that the lengths of data packets are different; the other is that different data packets may not be processed in a certain order. [0003] In hardware design, whether these protocol data packets can be processed quickly and efficiently has a great influence on the performance of the system. [0004] At present: all different types of data packets share a large memory, and set up respective one-way linked lists for different data packets, and string up the respective message classes in order; set up a...

AI Technical Summary

Problems solved by technology

When a message is written into the shared memory, a read operation and a write operation are performed on the address pool respectively; when a message is read out of the shared memory, a read operation and a write operation are also performed on the address pool respectively. Therefore, the existing The scheme cannot read two messages and write two messages in the shared memory at the same time, and the reading and writing speed of messages is greatly limited, thus affecting the performance of the system

Images