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Cache-based java card transaction processing method

A transaction processing and transaction technology, applied in the field of information security, can solve the problem of low performance of smart cards

Active Publication Date: 2012-06-13
FEITIAN TECHNOLOGIES
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, the performance of smart cards is relatively low, and the most influential one is the excessive write operations to EEPROM. However, the write operations to EEPROM by transaction processing related parts account for about 75% of the total EEPROM write operations. Therefore, to improve the performance of smart cards, transaction The optimization of the processing mechanism is an urgent task to be solved

Method used

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  • Cache-based java card transaction processing method
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  • Cache-based java card transaction processing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0134] The embodiment of the present invention provides a cache-based java card transaction processing method, including starting a transaction, executing a transaction, submitting a transaction, terminating a transaction and a power-down protection process, wherein executing a transaction includes an operation of reading data and an operation of writing data.

[0135] see figure 1 , the specific expression of the cache-based java card transaction processing method is as follows:

[0136] Step S1: Power on the java card virtual machine, judge whether to activate power-down protection, if so, activate power-down protection, execute step S3 after executing power-down protection, otherwise execute step S2;

[0137] Step S2: the java card virtual machine performs transaction processing initialization;

[0138] Specifically, in this embodiment, step S2 specifically includes: clearing the data in the second memory backup buffer and the new value buffer, setting the transaction proc...

Embodiment 2

[0185] see figure 1 , in the transaction processing mechanism, the transaction starts when the first API is called, and the specific steps are as follows:

[0186] Step 101: When the first application program interface of the java card is called, judge whether the value of the transaction processing flag a is true, if yes, report an error, otherwise execute step 102;

[0187] Preferably, in this embodiment, the first application program interface is specifically a begin transaction (begintranscation) interface.

[0188] Step 102: Set the value of the transaction processing flag a to true.

[0189] see figure 2 , in the transaction processing mechanism, when the first function is called, the write data operation is performed:

[0190] Step 201: When the first function is called, judge whether the value of the transaction flag a is true, if yes, execute step 203, otherwise execute step 202;

[0191] Preferably, in this embodiment, the first function is specifically a write ...

Embodiment 3

[0282] see Figure 7 In the embodiment of the present invention, the first new value is written to the address starting at 0x4000 in the first memory, the second new value is written to the address starting at 0x4050 in the first memory, and the second new value is written to the address starting at 0x4200 in the first memory. A cache-based Java transaction processing method flow is provided as an example for writing the third new value in the starting address, wherein the first new value is 40 bytes of data (5, 6, 7, 8. .., 45), the second new value is 90 bytes of data (5, 6, 7, 8, ..., 95), and the third new value is 130 bytes of data (5 , 6, 7, 8, ..., 135), the size of the first memory backup buffer is 2560 bytes, the size of the second memory backup buffer is 128 bytes, the size of the second memory new value buffer The size is 128 bytes.

[0283] Specific steps are as follows:

[0284] 1. Call the first API to start the transaction;

[0285] 2. Call the first functio...

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PUM

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Abstract

The invention discloses a cache-based java card transaction processing method and belongs to the field of information safety. The method comprises the following steps of: 1, energizing a java card virtual machine, judging whether a power-failure protection function is required to be started, if so, starting the power-failure protection function and directly executing the step 3, otherwise, executing the step 2; 2, performing transaction processing initialization; 3, acquiring an applet byte code; and 4, analyzing the applet byte code, if the applet byte code is a byte code which corresponds to a first application program interface, calling the first application program interface and executing the step 3, if the applet byte code is the byte code which corresponds to a first function, calling the first function and executing the step 3, if the applet byte code is the byte code which corresponds to a second function, calling the second function and executing the step 3, if the applet byte code is the byte code which corresponds to a second application program interface, calling the second application program interface and executing the step 3, if the applet byte code is the byte code which corresponds to a third application program interface, calling the third application program interface and executing the step 3, and if the applet byte code is other byte codes, executing corresponding operation according to the byte code and executing the step 3.

Description

technical field [0001] The invention relates to the field of information security, in particular to a cache-based java card transaction processing method. Background technique [0002] The integrated circuit inside the smart card includes a central processing unit CPU, a programmable read-only memory EEPROM (Electrically Erasable Programmable Read-Only Memory), a random access memory RAM (Random Access Memory) and a chip solidified in a read-only memory ROM (Read-Only Memory). On-chip operating system COS (Chip Operating System). At present, the performance of the smart card is relatively low, and the biggest impact is the excessive write operations to the EEPROM. However, the write operations to the EEPROM by the transaction processing related parts account for about 75% of the total EEPROM write operations. Therefore, to improve the performance of the smart card, the transaction The optimization of the processing mechanism is an urgent task to be solved. Contents of the...

Claims

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Application Information

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IPC IPC(8): G06F9/46G06F11/00G06F11/14
Inventor 陆舟于华章
Owner FEITIAN TECHNOLOGIES
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