Method for avoiding wafer damage in molding process of wafer level packaging
A wafer and process technology, applied in the field of wafer-level package preparation, which can solve problems such as poor adhesion and incomplete coverage of wafers with plastic encapsulants
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[0049] see image 3 As shown, the front side 100a of the wafer 100 includes a plurality of chips 110, and the plurality of chips 110 are cast and connected to each other. The adjacent chips 110 define the boundaries between each other through the scribe groove 115. Part is edge 120 .
[0050] see Figure 4As shown, in the cross-sectional diagram of the wafer 100 and the chip 110 , the integrated circuit is formed on the front side 100 a of the wafer 100 , and the other side of the wafer 100 is the back side 100 b. The bonding pad (Bond Pad) 101 is used as an input / output contact terminal (I / O Pad) of the internal circuit of the chip 110, and can be a signal input / output, or an interface of Power and Ground. In wafer-level packaging, redistribution technology RDL (Redistribution Technology) can be used to redesign the aluminum pads arranged around the top of the existing chip into a matrix arrangement. In the wafer 100, the top of any chip 110 is provided with a plurality of...
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