Method, device and multi-core processor system for realizing self-adaptive lock

Abstract

The invention provides a method, device and multi-core processor system for realizing a self-adaptive lock, wherein the method for realizing the self-adaptive lock comprises the following steps of: when a new first thread attempts to acquire the self-adaptive lock, if the self-adaptive lock is idle, enabling the first thread to acquire the self-adaptive lock, and otherwise, enabling the first thread to enter into a self-rotation state or an energy-saving state according to the competition fierce degree of the self-adaptive lock; when the first thread is in the energy-saving state, enabling the first thread to wait for being awaken to enter into the self-rotation state, or when the first thread is in the self-rotation state, enabling the first thread to compete for the self-adaptive lock till the first thread gets the self-adaptive lock by competition and the operation of sharing resources protected by the self-adaptive lock is completed, and releasing the self-adaptive lock; and when the self-adaptive lock is released, if the thread is in the energy-saving state, awaking another thread in the energy-saving state, and enabling the thread to enter into the self-rotation state so as to enable other threads which are in the self-rotation state to compete for the self-adaptive lock together.

Description

technical field [0001] Embodiments of the present invention relate to the computer field, and more specifically, relate to a method and device for realizing an adaptive lock and a multi-core processor system. Background technique [0002] With the continuous development of chip technology, multi-processor core systems have become more and more popular. In order to maximize the potential of multiple processor cores, applications usually run in parallel using multithreading. [0003] Most of today's computer systems with architectures, such as SMP (Symmetrical Multi-Processing Architecture, Symmetrical Multi-Processing Architecture), NUMA (Non Uniform Memory Access Architecture, Non-Uniform Memory Access Architecture), provide a unified physical memory address space. Therefore, multiple applications or threads can access (read or write) the same memory address through shared variables. However, there must be competition for parallel access to the same memory address. For ex...

AI Technical Summary

Problems solved by technology

As the number of cores increases and the number of parallel threads increases, the lock competition bec

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