Full-duplex communication control circuit for single port random access memory (SPRAM)

Abstract

The invention discloses a full-duplex communication control circuit for a single port random access memory (SPRAM). The full-duplex communication control circuit comprises a read-write conflict memorization circuit, a write command control circuit, a write operation buffer memory and an address selection circuit, wherein the read-write conflict memorization circuit is provided with a first latch for recording a write command during read operation and a second latch which is connected with the first latch and used for outputting a control instruction at the end of a read command; the write command control circuit is provided with a third latch; the resetting end of the third latch is connected with a read command input end; the clock end of the third latch is connected with a write command input end and the output end of the second latch and used for receiving the control instruction; the output end of the third latch is connected with a write command output end; the write operation buffer memory is provided with a data buffer memory and an address buffer memory; two input ends of the address selection circuit are respectively connected with a read address input end and the output end of the address buffer memory; the output end of the address selection circuit is connected with an address output end; and the control end of the address selection circuit is connected with the read command input end. The full-duplex communication control circuit has the effects of saving the volume of a chip and reducing the occupied area.

Description

technical field [0001] The invention relates to the field of control circuits, and more specifically relates to a SPRAM full-duplex communication control circuit, which is assembled between the SPRAM read-write control circuit and the SPRAM body, so as to achieve full-duplex use of the SPRAM body. Background technique [0002] The LED array scanning driver chip using SRAM as the storage device needs to continuously and periodically read data from the SRAM in the chip during normal operation, so as to drive the LED display correctly. At the same time, in order to control the LED array display, the main control device needs to use the I2C serial communication method to continuously write data to the SRAM, so the read operation and write operation may be initiated to the SRAM at the same time. [0003] The SPRAM (Single Port SRAM, referred to as SPRAM) core unit circuit is composed of 6 MOS tubes. The memory composed of the SPRAM unit has only one set of address bus and one set...

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide a SPRAM full-duplex communication control circuit, which is connected between the SPRAM read-write control circuit and the SPRAM body, so that the SPRAM body can realize full-duplex communication, and solve the problem of full-duplex communication in the prior art. Memory has the problem of occupying a large layout area

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