Asynchronous data reading/writing control method, device and system

Abstract

The invention is applicable to the field of chip design, and provides an asynchronous data reading / writing control method, device and system. The method comprises the following steps of: acquiring a reading / writing command from a command initiation end, and generating a command packet, wherein the command packet comprises an enable signal, an address signal and a data signal of the reading / writing command; caching the command packet through the clock trigger of the command initiation end, and setting a caching state signal to be effective at the same time; and setting the caching state signal to be ineffective at the time when the command packet is obtained by a command receiving end through the clock trigger of the command receiving end. In the invention, timely feedback of the caching state and effective isolation among different clock domains are realized by setting the caching state signal to be effective through the clock trigger of the command initiation end at the time when the reading / writing command of the command initiation end is encapsulated and cached and setting the caching state signal to be ineffective through the clock trigger of the command receiving end at the time when the command receiving end acquires the command.

Description

technical field [0001] The invention belongs to the field of chip design, and in particular relates to an asynchronous data reading and writing control method, device and system. Background technique [0002] In chip design, it usually involves the process of reading and writing data across clock domains of the chip interface module. When bidirectional data transmission is performed in the form of a bus, it often faces conflicts between reading and writing data input and output, which leads to data reception errors. Therefore , it is necessary to perform read and write control on asynchronously transmitted data. [0003] The existing asynchronous data reading and writing control method is usually realized by the asynchronous first-in-first-out (First Input First Output, FIFO) method, after the address of the dual-port random access memory (Random Access Memory, RAM) is converted into Gray code, and the judgment is passed. The distance of the address is used to judge the emp...

AI Technical Summary

Problems solved by technology

[0006] The purpose of the embodiments of the present invention is to provide an asynchronous data reading and writing control method, which aims to solve the problem that the existing technology cannot simply and quickly complete the asynchronous data reading and writing process while ensuring effective isolation across clock domains

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