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Combined substrate high-k metal gate device and oxide-polysilicon gate device, and process of fabricating same

A semiconductor and device technology, applied in the field of combined substrates of high dielectric constant electric metal gate devices and oxide-polysilicon gate devices

Inactive Publication Date: 2012-11-21
BROADCOM CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, SiO2 gates are still preferred when the design requires high power / high voltage applications

Method used

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  • Combined substrate high-k metal gate device and oxide-polysilicon gate device, and process of fabricating same
  • Combined substrate high-k metal gate device and oxide-polysilicon gate device, and process of fabricating same
  • Combined substrate high-k metal gate device and oxide-polysilicon gate device, and process of fabricating same

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Embodiment Construction

[0070] The need for low power / low voltage devices and high power / high voltage devices presents particular challenges to the fabrication of high dielectric constant metal devices. The standard high-k metal gate fabrication method usually fabricates two high-k devices in parallel. The manufacturing process of the high-k metal gate includes forming two dummy polysilicon gates (dummy gates) on the substrate. These dummy gates are sacrificial structures replaced by high-k metal gates. Sacrificial structures are wasted under conventional processes, and beyond the above comments, the sacrificial designs add no value to the fabrication process. The second step, similar to the process described above, requires the formation of conventional oxide gates that are compatible with high-k metal gates. The second step of adding a traditional oxide gate adds complexity, as well as costs associated with fabricating high-k metal gates.

[0071] 1. Combination substrate of high dielectric cons...

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Abstract

A semiconductor structure having combined substrate high-K metal gate device and an oxide-polysilicon gate device and a process of fabricating same are provided. The semiconductor structure enables mixed low power / low voltage and high power / high voltage applications to be supported on the same chip.

Description

technical field [0001] The present application generally relates to semiconductor devices, and more specifically, relates to a combined substrate of a high dielectric constant electric metal gate device and an oxide-polysilicon gate device and a manufacturing method thereof. Background technique [0002] Over the past few decades, the semiconductor industry has grown rapidly in the area of ​​integrated circuits (ICs). Advances in microelectronics are the driving force behind the need for smaller and more complex integrated circuits. The semiconductor industry has employed a variety of strategies to respond to the skyrocketing demand to reduce the size of integrated circuits. One approach is to reduce the thickness of the silicon dioxide insulating material at the gates of integrated circuit devices, such as transistors. This method has been used for decades. But the thickness of the silicon dioxide insulating material can only be reduced to a certain extent before leakage...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/088H01L27/092H01L21/8234
CPCH01L29/66545H01L29/7833H01L21/82345H01L21/823842H01L29/517
Inventor 陈向东夏为
Owner BROADCOM CORP