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General CRC (cyclical redundancy check) verification algorithm implemented based on hardware description language

A technology of hardware description language and CRC algorithm, applied in electrical components, using block codes for error correction/detection, error detection coding with multiple parity bits, etc., can solve the problems of difficult design and high requirements of CRC algorithm

Inactive Publication Date: 2012-12-12
CHONGQING JINMEI COMM
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Problems solved by technology

[0006] In order to solve the problem that designers have high requirements and difficult design when implementing CRC algorithm, the present invention provides a general-purpose CRC algorithm based on hardware description language. When calling, it only needs a simple call, and the designer can change the generator polynomial of the CRC arbitrarily when calling, and can also use serial or parallel (any data width) data input at will

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  • General CRC (cyclical redundancy check) verification algorithm implemented based on hardware description language

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Embodiment Construction

[0008] The present invention is realized by hardware description language (only VHDL code is provided here), and provides a function that can change input data bit width and generate polynomial at will for designers to call.

[0009] In the function, the parameter "data" is the input data when CRC calculation is required. The input data can be serial or parallel (bit width is not limited), and the function will automatically calculate the bit width according to the input data. The parameter "CRC" is the CRC result calculated by this function, and the parameter "CRC_ACCUM" is a generator polynomial. The caller can use a standard generator polynomial, or design it arbitrarily as needed. For example, the generator polynomial of CRC-16 is , then CRC_ACCUM=X”1021”, the call is very simple.

[0010] function Get_CRC(

[0011] data : std_logic_vector;

[0012] CRC : std_logic_vector;

[0013] CRC_ACCUM : std_logic_vector

[0014] )return std_logic_vector is

[00...

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Abstract

The invention discloses a general CRC (cyclical redundancy check) verification algorithm implemented based on the hardware description language. According to system design requirements, CRC generator polynomials can be changed optionally, and serial or parallel input data of arbitrary bit widths can be adopted. The general CRC verification algorithm implemented based on the hardware description language is flexible in implementation and simple in calling and has the advantages that CRC algorithm design is simplified and difficulty in implementation of the CRC algorithm is lowered by the method.

Description

technical field [0001] The invention relates to the fields of data communication and network transmission, in particular to a CRC error identification and detection processing method in the process of information transmission. Background technique [0002] In the process of data communication and network transmission of information, the fault tolerance of information is a very important issue. Cyclic Redundancy Check (CRC) check is a commonly used data fault tolerance and error detection method. It is used in information transmission, data It is widely used in communication fields such as compression. The basic idea of ​​CRC comparison is to use linear coding theory to generate a relatively valid r-bit supervision code (CRC code) according to certain rules according to the k-bit binary code sequence to be transmitted at the sending end and attach it to the original information to form a A new binary code sequence with a total of k+r bits is sent out. At the receiving end, ...

Claims

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Application Information

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IPC IPC(8): H04L1/00H03M13/11
Inventor 于进强其他发明人请求不公开姓名
Owner CHONGQING JINMEI COMM
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