Manufacturing method of semiconductor device

Abstract

The invention provides a manufacturing method of a semiconductor device. The manufacturing method comprises the following steps: providing a semiconductor substrate and forming a gate structure on the semiconductor substrate; forming a groove at a part which is prone to formation of a source region / drain region in the semiconductor substrate; performing pre-amorphization injection on the semiconductor substrate to form an amorphous layer at the bottom of the groove; performing anisotropic wet etching on the semiconductor substrate containing the amorphous layer so that the side wall of the groove is concave towards the direction of the ditch of the device to form a sigma-shaped groove; annealing to crystallize the amorphous layer, and further performing secondary anisotropic wet etching to remove the amorphous layer; and performing epitaxial growth of a germanium-silicon stress layer in the sigma-shaped groove. According to the manufacturing method, the sigma-shaped groove used for an embedded germanium-silicon strain MOS (metal oxide semiconductor) device is formed, an etching barrier layer is formed by anisotropic wet etching through adopting the pre-amorphization injection during the process of manufacturing the groove, the micro-loading effect can be reduced and the etching efficiency can be improved.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for manufacturing a Σ-shaped groove for an embedded germanium-silicon strain MOS device. Background technique [0002] In order to improve the mobility of carriers in the channel of PMOS devices, the technology of making grooves in the part where the source / drain regions of the PMOS devices will be formed to form embedded silicon germanium has become a hot spot of widespread concern. For the semiconductor manufacturing process of 45nm and above nodes, due to the scaling down of the device size, the length of the device channel is also shortened accordingly. The concave groove in the channel direction can effectively shorten the length of the device channel and meet the requirement of proportional reduction in device size; at the same time, because this groove has the characteristics of a large undercut under the gate spacer, therefore, in this The embedded silico...

AI Technical Summary

Problems solved by technology

Due to the increase in device design pattern density due to device scaling, the anisotropic wet etch followed by the dry etch process can cause microloading effects, resulting in reduced etch rates and poorer etch performance

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