Chemical Vapor Deposition Silicon Epitaxial Growth Method

Abstract

The invention discloses silicon epitaxial growth method via chemical vapor deposition (CVD). The method includes delivering a substrate to a process cavity, introducing hydrogen to perform purification, controlling pressure to a first pressure, raising the substrate temperature to a first temperature, introducing hydrogen gas with a first flow, and baking for a first time; reducing the substrate temperature to a second temperature, raising pressure to a second pressure, reducing hydrogen gas introduction flow to a second flow, and holding for a second time to perform stabilization, wherein the second temperature is lower than the first temperature, the second pressure is higher than the first pressure, and the second flow is lower than the first flow; introducing silicon source gas after stabilization, and performing silicon epitaxial growth; and reducing the substrate temperature, and delivering the substrate out. The method can reduce P-type self-doping degree when growing silicon epitaxial layer on the silicon substrate with P-type heavily-doped or P-type buried layer.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a chemical vapor deposition (CVD) silicon epitaxial growth method. Background technique [0002] Chemical vapor deposition (CVD) is commonly used in industry for epitaxial growth. This method is to place the silicon substrate in a reducing atmosphere or an inert atmosphere (mostly H 2 ), and input silicon source gas to make it react, generate silicon atoms and deposit on the silicon substrate, and grow a silicon single crystal layer with the same crystal orientation as the silicon substrate. At present, with the development of large-scale integrated circuits, ultra-large-scale integrated circuits and microwave devices, it is increasingly necessary to grow epitaxial layers with thinner thickness, more uniform resistivity distribution, and steeper epitaxial layer / substrate interface distribution. The conventional silicon epitaxy process used has two high temperature process...

AI Technical Summary

Problems solved by technology

[0006] (1) The minimum thickness that can be achieved by epitaxy is limited, and the thickness cannot be reduced, which limits the integration of integrated circuits by reducing the vertical and horizontal dimensions of devices proportionally.

[0007] (2) The increase in the resistivity of the epitaxial layer on a heavily doped substrate or a heavily doped buried layer substrate is limited

[0013] However, the method of growing the intrinsic layer complicates the control of the process and affects the effective thickness of the silicon epitaxial layer. At the same time, the process effect on the self-doping is not good; the silicon quality of low-temperature epitaxy is not good, and the growth is slow , the cost increases; the method of growing a back seal on the back of the substrate can suppress the self-doping from the back of the substrate to a certain extent, but cannot suppress the self-doping from the buried layer

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