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semiconductor module

A technology of semiconductors and printed substrates, which is applied in the field of semiconductor modules and can solve problems such as signal quality degradation

Inactive Publication Date: 2015-08-12
TOSHIBA MEMORY CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The plating lead acts as a stub line for the signal line, so if the plating lead is present, stub noise will be added to the signal, and the signal quality will degrade.

Method used

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Experimental program
Comparison scheme
Effect test

no. 1 Embodiment approach )

[0027] figure 1 (a) is a sectional view showing a schematic structure of the semiconductor module according to the first embodiment, figure 1 (b) is a plan view showing a schematic configuration of the semiconductor module according to the first embodiment. Furthermore, figure 1 (a) is at figure 1 (b) Sectional view cut at line A-A.

[0028] exist figure 1 (a) and figure 1 In (b), terminal electrodes 12 a and 12 b are formed on the surface of the printed circuit board 11 . In addition, a multilayer substrate or a build-up substrate may be used as the printed circuit board 11 . In addition, as the base material of the printed circuit board 11, for example, glass epoxy resin may be used, and a sheet-shaped substrate such as polyimide or polyester may be used. Furthermore, the solder resist layer 13 is formed on the surface of the printed circuit board 11 so that the surfaces of the terminal electrodes 12a and 12b are exposed. Here, the metal coating layer 14b is formed o...

no. 2 Embodiment approach )

[0036] figure 2 (a) is a plan view showing the method of manufacturing a printed circuit board according to the second embodiment, figure 2 (b)~ figure 2 (d) is a sectional view showing the method of manufacturing a printed circuit board according to the second embodiment. Furthermore, figure 2 (b) is at figure 2 (a) Sectional view cut at line B-B.

[0037] figure 2 (a) and figure 2In (b), the base material 10 is divided for each singulation region 20 . Moreover, terminal electrodes 22 and plating leads 23 are formed in each singulation region 20 on the back of the base material 10, and power supply lines PL1 and Power supply terminal PL2. In addition, terminal electrodes 12 a and 12 b are formed in each of the singulated regions 20 on the surface of the substrate 10 . Furthermore, plating leads and power supply lines connected to the terminal electrodes 12a and 12b may be formed on the surface of the base material 10 .

[0038] Next, if figure 2 As shown in...

no. 3 Embodiment approach )

[0041] image 3 (a) is a plan view showing the method of manufacturing the semiconductor module according to the third embodiment, image 3 (b)~ image 3 (f) is a cross-sectional view showing the method of manufacturing the semiconductor module according to the third embodiment. Furthermore, image 3 (b) is at image 3 (a) Sectional view cut at line B-B.

[0042] exist image 3 (a) and image 3 (b), in figure 2 After the step of (d), the plating lead 23 is cut in the middle by forming the gap 24 on the plating lead 23 exposed from the solder resist layer 27 .

[0043] Next, if image 3 As shown in (c), semiconductor chips 15 a and 15 b are mounted on the surface side of the base material 10 . Then, the pad electrodes 16a, 16b are electrically connected to the terminal electrodes 12a, 12b via the bonding wires 17a, 17b, respectively.

[0044] Next, if image 3 As shown in (d), sealing resin 18 is formed on the surface side of base material 10 by injection molding or...

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Abstract

According to one embodiment, a semiconductor module includes a semiconductor chip that is mounted on a printed substrate, a terminal electrode that is formed on the printed substrate so as to be electrically connected to the semiconductor chip, a metal coating layer that is formed on the terminal electrode, a plating lead wire that is electrically connected to the terminal electrode, and a gap that is formed in the plating lead wire.

Description

technical field [0001] Embodiments of the invention generally relate to semiconductor modules. Background technique [0002] In semiconductor modules such as ball grid arrays, in order to perform plating on pad electrodes to which solder balls are bonded, plating leads are drawn from the pad electrodes. The plating lead wire functions as a stub wire for the signal line, and therefore, if the plating lead wire exists, stub noise is added to the signal, and signal quality may degrade. Contents of the invention [0003] Embodiments of the present invention aim to provide high-quality semiconductor modules. [0004] According to the semiconductor module of the embodiment, a semiconductor chip, terminal electrodes, a metal coating layer, leads, and gaps are provided. A semiconductor chip is mounted on a printed substrate. Terminal electrodes are formed on the printed board and are electrically connected to the semiconductor chip. The metal coating layer covers the terminal ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/498
CPCH01L25/0655H01L25/0657H01L2224/32145H01L23/3128H01L2224/32225H01L21/561H01L2924/15321H01L2224/97H01L2225/06562H01L2224/73265H01L2224/48145H01L23/49816H01L24/97H01L2224/48091H01L2924/12041H01L2224/48227H01L2924/15311H01L24/73H01L2924/181H01L2924/00012H01L2224/85H01L2924/00H01L2924/00014
Inventor 小泽勲
Owner TOSHIBA MEMORY CORP