Formalization method for verification and performance analysis of high reliable communication system

Abstract

Provided is a formalization method for verification and performance analysis of a high reliable communication system. The formalization method includes five steps. The formalization method is a method for communication system formal verification and analysis based on the combination of model testing and theorem proving. Based on the method of hypothesis guarantee, an environmental state machine is established to achieve layering modeling for design of a network communication system, the formal verification for determinant attributes is achieved, high order logical formalization with a random variable statistic character is achieved for protocol transmission processes and the method and design of attributive high order logical formal modeling, and based on the high-order logic model and the correlation theorem which are established on HOL4, automatic verification and dynamic performance analysis based on the formal model are achieved. The formalization method has good practical value and wide application prospects in the technical field of formal verification engineering.

Description

technical field [0001] The present invention relates to a formalized method for verification and performance analysis of highly reliable communication systems, which is an integrated implementation method of reliability verification (Reliability, Maintainability and Supportability, RMS for short) and performance analysis of embedded system communication, especially It is an integrated process construction method based on formal method verification and system quantitative performance analysis, and belongs to the technical field of formal verification engineering application. Background technique [0002] The communication system in the system-on-chip of many key applications usually has extremely high functional reliability, strict real-time and other requirements. There are countless examples of system-on-chip failures in critical applications resulting in significant loss of life and property; the traditional verification method for system-on-chip is testing or fault simula...

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Problems solved by technology

For the wide application of data transmission or concurrent and distributed processes in system-on-chip, the formal verification of the functional attributes of these applications usually adopts the method of model checking, but due to the low level of abstraction of the model checking method, only qualitative testing can be performed. If the abstraction is improper or the protocol is complex, it is easy to cause too many states, or even state explosion

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