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GPIO (general purpose input/output) IP (internet protocol) core with security mechanism

A security mechanism, APB bridge technology, applied in the field of GPIO

Active Publication Date: 2013-05-01
SUZHOU ZHONGKE ADVANCED TECH RES INST CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Among them, there is a security problem in the communication of the above-mentioned GPIO interface.

Method used

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  • GPIO (general purpose input/output) IP (internet protocol) core with security mechanism
  • GPIO (general purpose input/output) IP (internet protocol) core with security mechanism
  • GPIO (general purpose input/output) IP (internet protocol) core with security mechanism

Examples

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Embodiment Construction

[0042] Such as figure 1 Shown is a block diagram of a system-on-chip. The system-on-chip includes a GPIO IP core 10 with a security mechanism in this embodiment. The GPIO IP core 10 with a security mechanism is connected to the APB bridge, and transmits data between the APB bridge and the CPU.

[0043] Such as figure 2 Shown is a module structure diagram of the GPIO IP core of an embodiment. The GPIO IP core 10 includes a GPIO input and output logic module 100 , an encryption module 200 and a decryption module 300 . The GPIO input and output logic module 100 is connected to the APB bridge, receives configuration information from the APB bridge, and at least completes the function of inputting and outputting data after the configuration is completed. The encryption module 200 receives the data from the APB bridge, encrypts and transmits the data to the GPIO input and output logic module 100 . The decryption module 300 receives the ciphertext from the GPIO input and output...

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PUM

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Abstract

The invention discloses a GPIO (general purpose input / output) IP (internet protocol) core with a security mechanism. The GPIO IP core with the security mechanism comprises a GPIO logic module, an encryption module and a decryption module, wherein the GPIO logic module is connected with an APB (advanced peripheral bus) bridge to receive configuration information from the APB bridge; after configuration is finished, a function of inputting and outputting data is at least finished; the encryption module receives clear data from the APB bridge; after the clear data is encrypted, the clear data is transmitted to the GPIO logic module; the decryption module receives ciphertext data from the GPIO logic module; and the ciphertext data is output to the APB bridge after being decrypted. The GPIO IP core is used for encrypting and decrypting data subjected to GPIO so as to guarantee the data communication security of a GPIO interface.

Description

technical field [0001] The invention relates to GPIO technology, in particular to a GPIO IP core with a safety mechanism. Background technique [0002] General Purpose Input Output (General Purpose Input / Output), referred to as GPIO. At present, GPIO is generally used as the control port of CPU peripheral equipment or realizes the communication between CPU and the outside world by simulating I2C and SPI communication interfaces. [0003] The AMBA bus is a high-level microcontroller bus system proposed by ARM Corporation, and its specification defines an on-chip communication standard when designing high-performance embedded microcontrollers. Three different buses are defined according to the AMBA standard: Advanced High Performance Bus (AHB), Advanced System Bus (ASB), and Advanced Peripheral Bus (APB). [0004] The communication within the system generally adopts the AHB bus. As the secondary bus of the high-performance channel of the main bus, APB is used for low-power ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F21/85
Inventor 聂泽东胡必祥
Owner SUZHOU ZHONGKE ADVANCED TECH RES INST CO LTD
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