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Method for detecting defects in ram production

A defect and post-test technology, applied in the field of RAM production defect detection, can solve the problems of adjacent bit influence, adjacent bit becoming 1 or 0 state, etc., to achieve the effect of improving efficiency

Active Publication Date: 2016-01-06
SHANDONG SINOCHIP SEMICON
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] ◆Idempotent CouplingFault (CFid, idempotent coupling fault): When operating a certain bit in the RAM to be tested, if the value written in the bit is different from the original value of the bit, a transition will occur, and this transition process may affect the Its adjacent bits have an impact, which may cause adjacent bits to become 1 or 0

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  • Method for detecting defects in ram production
  • Method for detecting defects in ram production

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Embodiment Construction

[0030] Based on the analysis of various defects in the background technology, through such as figure 2 The generation of the test vector shown, wherein the original number written by the test vector to the current address of the RAM is used as an input of the comparator to compare the read number with the original number and test the corresponding RAM.

[0031] According to the present invention, a complete test method can be simply expressed as follows:

[0032] ↑write0

[0033] ↑ read0, write1, read1, write0, read0, write1

[0034] ↑ read1, write0, read0, write1

[0035] ↓read1,write0

[0036] ↓read0, write1, read1, write0, writedata1, readdata1, writedata2, readdata2

[0037] The up arrow is the operation from low address to high address, the down arrow is the operation from high address to low address, 0 means all 0, 1 means all 1, data1 is 101010..., data2 is 010101.... The test method is divided into five parts, each part represents the operation of the e...

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Abstract

The invention discloses a method for detecting defects in RAM production. According to the invention, the test for the next step based on the current address state of the RAM in the previous test step is realized, and it is not necessary to test only one test point for each test, so that it is not necessary to test for each A RAM reset and repeated use of the test method, the efficiency is greatly improved.

Description

technical field [0001] The invention relates to a method for detecting defects in RAM production. Background technique [0002] The macroscopic RAM (Random Access Memory, random access memory) test includes the test of the storage unit, the test of the data line and the test of the address line. As for the control line, since the test of the first two has been completed incidentally, no special test is performed. The test of the address line is always carried out under the assumption that the data line is normal. Obviously, the test of the data line needs to be carried out first, and then the test of the address line can be carried out. [0003] With the increase of the scale of integrated circuits and the improvement of integration, the number of RAMs in the system is increasing, and the width and depth are also different, and its testing also needs to be refined. In the past, to complete the test of RAM in the system, the test methods used could not test all the defects ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/56
Inventor 赵阳张洪柳孙晓宁刘大铕王运哲刘守浩
Owner SHANDONG SINOCHIP SEMICON