Integrated data model based framework for driving design convergence from architecture optimization to physical design closure

Abstract

Systems and methods are disclosed to automatically synthesize a custom integrated circuit by receiving a specification of the custom integrated circuit including computer readable code and one or more constraints on the custom integrated circuit, encoding architecture level knowledge in a data model to generate and pass new constraints for physical synthesis of a chip specification uniquely customized to the computer readable code, receiving a look-ahead cost function during architecture optimization consistent with cost observed later in the flow after detailed physical synthesis is performed, wherein the look-ahead cost function is generated from a prior iteration and supplied to a subsequent iteration through the data model, and automatically translating information available at one optimization point into a constraint for another optimization point invoked at a different place in the design flow using the data model.

Description

technical field [0001] The invention relates to a frame used for EDA design convergence. Background technique [0002] figure 1 A high-level view showing a typical SoC design flow. In conventional system-on-chip (SoC) processing, the design specification 1 is processed using an architectural / micro-architectural design optimization block 40 . The result of this block 40 is the behavior register transfer language (RTL) 150 received by the netlist synthesis block 50 . A gating level netlist 160 is generated, which physical synthesis block 60 can use to generate a full chip layout. The layout can be analyzed by the full chip analysis block 70 . The delay dependency updates may be provided as feedback to the architectural / micro-architectural design optimization block 40 . Additionally, critical delay information may be provided to netlist synthesis module 50 . Typically, this process requires implementing the complete design within a number of specialized optimization modul...

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Thus, there is a discontinuity in the underlying data model

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