Array substrate and preparation method thereof, liquid crystal panel and display device
A technology for array substrates and liquid crystal panels, applied in transistors, semiconductor/solid-state device manufacturing, optics, etc., can solve problems such as increased device density, reduced side light transmittance, and poor curing effect of sealant to improve reliability , increase the curing strength and adhesion, improve the effect of light transmittance
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Embodiment 1
[0039] Such as Figure 4a As shown, it is a top view of the array substrate of the first structure, Figure 4b for Figure 4aThe schematic diagram of the cross-sectional structure in the BB direction of , including a buffer layer 21 on the glass substrate 20, a polysilicon layer 22 on the buffer layer 21, a gate insulating layer 23 (GateInsulation, GI) on the polysilicon layer 22, and a gate insulating layer 23 on the The electrode insulating layer 24 on the electrode insulating layer 24, the gate electrode layer 25 on the electrode insulating layer 24, and the source electrode layer 26 and the drain electrode layer 27 on both sides of the gate electrode layer 25 are located on the source electrode layer 26, the drain electrode layer 27 and the gate electrode layer 25. An insulating layer 28 on the electrode layer 25 .
[0040] Correspondingly, an embodiment of the present invention provides a method for preparing an array substrate with the above structure, such as Figure...
Embodiment 2
[0050] Such as Figure 6a As shown, it is a top view of the array substrate of the second structure, Figure 6b for Figure 6a The schematic diagram of the cross-sectional structure in the CC direction of , including a buffer layer 21 on the glass substrate 20, a polysilicon layer 22 on the buffer layer 21, a gate insulating layer 23 (GateInsulation, GI) on the polysilicon layer 22, and a gate insulating layer 23 on the The electrode insulating layer 24 on the electrode insulating layer 24 and the source electrode layer 26 and the drain electrode layer 27 on both sides of the electrode insulating layer are located on the source electrode layer 26, the drain electrode layer 27 and the insulating layer on the electrode insulating layer 24 28, and the gate electrode layer 25 on the insulating layer 28.
[0051] Correspondingly, an embodiment of the present invention provides a method for preparing an array substrate with the above structure, such as Figure 7 shown, including ...
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