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Priority coding method capable of supporting a plurality of search modes in comparison search chip

A technology of priority encoding and priority encoder, which is applied in static memory, instrumentation, memory address/allocation/relocation, etc., can solve the problem of large wiring channel requirements, limitations of different bit width modes, inability to provide more modes, etc. question

Active Publication Date: 2013-10-09
苏州雄立科技有限公司
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Problems solved by technology

However, when the existing CAM supports multiple bit width searches, due to the huge demand for the internal wiring channels of the chip, the types of different bit width modes it can provide are greatly limited, and it is impossible to provide more modes to meet the needs of different application fields.

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  • Priority coding method capable of supporting a plurality of search modes in comparison search chip
  • Priority coding method capable of supporting a plurality of search modes in comparison search chip
  • Priority coding method capable of supporting a plurality of search modes in comparison search chip

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Embodiment Construction

[0030] The specific method of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0031] attached Figure 4 It is a specific implementation completed according to the present invention. This implementation can support 4 different bit width modes at the same time, namely 8KX80, 4KX160, 2KX320 and 1KX640. It consists of 8 80-bit array modules, and each array module has 1K rows. The whole implementation requires 13-bit address, including 3-bit block address and 10-bit row address.

[0032] as attached Figure 4 As shown, the 8 CAM arrays are divided into two groups, and the matching results (mf0, mf1...) of each group of CAM arrays are output to the underlying priority encoder (PE), and the underlying PE will output matching results under different configurations. and output the matching block address. The top-level PE will judge the final matching result based on the matching result of the bottom-level PE, and calculate th...

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Abstract

The invention discloses a priority coding method capable of supporting a plurality of search modes in a web search chip. The priority coding method comprises the following step that a comparison unit array is divided into groups; and a hit address of the highest priority is produced by different grades of priority coders, wherein the lower-grade priority coders are used for producing low-grade module row addresses and calculate a corresponding word matching result according to different bit width arrangement and the top priority coder is used for producing a line address and a final row address. The priority coding method can greatly reduce requirements of a network search chip supporting a plurality of bit widths on lines. Through the priority coding method, a chip has a capability of supporting more search bit widths.

Description

technical field [0001] The present invention relates to the field of design and manufacture of integrated circuits, specifically, but not limited to, a priority encoding method for content addressable memory hits. Background technique [0002] A typical memory (RAM or ROM) uses an address to indicate the location of a memory cell, and outputs the data in the memory cell at that location. In contrast, a content addressable memory (CAM) receives external retrieval data, compares whether the retrieval data matches the data stored in the CAM, and outputs the address of the matching data in the CAM. Since the word consistent with the retrieved data is not limited to one, when there are multiple words consistent with the retrieved data in the CAM, a priority encoder is needed to respond to the coincidence signal output from the storage unit (indicating that it is consistent with the retrieved data Signals for consistent cases) are encoded and the highest priority address signal i...

Claims

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Application Information

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IPC IPC(8): G11C15/00G06F12/02
Inventor 王灿锋杨昌楷张建杰
Owner 苏州雄立科技有限公司
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