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A glitch-free adaptive clock switching method for uart interface chips

An interface chip, clock switching technology, applied in the direction of generating/distributing signals, etc., can solve the problem of unable to reach the power consumption of the UART interface chip, and achieve the effect of avoiding runaway

Inactive Publication Date: 2018-02-09
NO 8357 RES INST OF THE THIRD ACADEMY OF CHINA AEROSPACE SCI & IND
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the existence of the internal clock multiplier of the UART interface chip, the optimization of the power consumption of the UART interface chip cannot be achieved only by adjusting the baud rate by frequency division.

Method used

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  • A glitch-free adaptive clock switching method for uart interface chips
  • A glitch-free adaptive clock switching method for uart interface chips
  • A glitch-free adaptive clock switching method for uart interface chips

Examples

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Embodiment

[0042] UART interface chip of the present invention such as figure 2 As shown, an adaptive clock switching module 201 is added before the prescaler 101 of the original high-speed UART interface chip, and the adaptive clock switching module 201 is connected with the main clock of the chip, and performs the switching of the main clock of the chip according to the state change of the frequency multiplier. switch.

[0043] The specific self-adaptive clock switching module 201 also includes a working state identification module 202 and a clock switching module 203. The working state identification module 202 calculates the frequency of the main clock required by the chip according to the working state information of the UART interface chip written in parallel by the CPU. Whether the main clock frequency is higher than the input clock frequency and the current frequency multiplier state, judge whether to open the frequency multiplier and calculate the multiplication frequency if ne...

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PUM

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Abstract

The invention discloses a clock switching method of a UART interface chip, which comprises the following steps: 1) an adaptive clock switching module obtains the next working state of the UART interface chip according to the configuration information written in parallel by the CPU: input clock frequency and baud rate ;2) Calculate the main clock frequency required by the UART interface chip; 3) Compare the required main clock frequency with the input clock frequency, when the required main clock frequency is higher than the input clock frequency, calculate the multiplication frequency, turn on the frequency multiplier, When the main clock frequency is lower than the input clock frequency, turn off the frequency multiplier; 4) Switch the main clock of the chip according to the opening and closing of the frequency multiplier. The UART interface chip includes an adaptive clock switching module connected with the main clock of the chip. According to the current working state of the high-speed UART interface chip and the next working state written by the CPU, the invention automatically adjusts the clock strategy of the chip to achieve the purpose of optimizing power consumption.

Description

technical field [0001] The invention relates to a clock switching method of a UART interface chip. Background technique [0002] Data transmission between the host computer and external devices includes parallel transmission and serial transmission, among which parallel transmission is used for short distance and fast speed occasions, and serial transmission is usually used for long distance and low speed requirements. transmission. Such as figure 1 As shown, the UART (Universal Asynchronous Transceiver) interface chip is often used for parallel-to-serial port conversion between the CPU and the serial device: the UART interface chip converts the data written in parallel by the CPU into a serial port protocol, according to the preset frame format and waveform The baud rate is sent to the serial device; and the received serial data is stored in the internal cache for parallel reading by the CPU. [0003] Most UART interface chips can work at multiple baud rates (transmissio...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/04
Inventor 郑炜朱天成李鑫杨阳周津
Owner NO 8357 RES INST OF THE THIRD ACADEMY OF CHINA AEROSPACE SCI & IND
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