PN step of LED (Light Emitting Diode) chip, LED chip and manufacturing method of PN step
A technology of LED chips and manufacturing methods, which is applied in the direction of electrical components, circuits, semiconductor devices, etc., can solve the problems of reducing the light output effect of LED chips, the drop of LED chip turn-on voltage, and poor coverage effects, so as to increase the effective coverage area and reduce leakage. Current, the effect of increasing the turn-on voltage
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Embodiment 1
[0042] See figure 2 As shown, a PN step of an LED chip. The LED chip (not shown) includes a substrate and an epitaxial layer 200 formed on the substrate. The epitaxial layer 200 includes an N-type conductive layer, a light-emitting layer, and a P-type conductive layer ( The drawings in this paper are not specifically divided and shown), the epitaxial layer 200 has a PN step 200a, the PN step 200a is covered with an insulating passivation film 300, the upper step surface 210 of the PN step 200a is a P-type conductive layer, and the lower step surface 220 is an N-type conductive layer, and the connection between the upper stepped surface 210 and the lower stepped surface 220 forms a PN stepped side surface 230;
[0043] Wherein, the PN step side 230 includes a first connection side on the upper step surface 210 and a second connection side on the lower step surface 220, the second connection side is located between the first connection side and the end of the lower step surface...
Embodiment 2
[0056] See image 3 As shown, a PN step of an LED chip, the LED chip includes a substrate and an epitaxial layer 200 formed on the substrate, the epitaxial layer 200 sequentially includes an N-type conductive layer, a light emitting layer and a P-type conductive layer, and the epitaxial layer 200 has a PN The step 200a, the PN step 200a is covered with an insulating passivation film 300, the upper step surface 210 of the PN step 200a is a P-type conductive layer, and the lower step surface 220 is an N-type conductive layer, and the upper step surface 210 and the lower step surface 220 The inter-connection forms the PN step side 230;
[0057] Wherein, the PN step side 230 includes a first connection side on the upper step surface 210 and a second connection side on the lower step surface 220, the second connection side is located between the first connection side and the end of the lower step surface 220, and the PN The side surface 230 of the step is a slope, preferably, the ...
Embodiment 3
[0062] An LED chip, comprising a substrate, an epitaxial layer 200 formed on the substrate and consisting of an N-type conductive layer, a light-emitting layer and a P-type conductive layer, an N-type electrode electrically connected to the N-type conductive layer, and an N-type electrode electrically connected to the P-type conductive layer. P-type electrodes electrically connected to the conductive layer, see Figure 5 As shown, the epitaxial layer 200 has a PN step, and the PN step 200a is covered with an insulating passivation film 300 , wherein the PN step adopts the PN step 200a as described in Embodiment 1 or Embodiment 2. Specifically, the insulating passivation film 300 may be covered on the PN step 200a by using a deposition method or other known methods.
[0063] In order to facilitate the description of the core technical points and technical effects of the present invention, this patent Figure 5 The shown insulating passivation film 300 is directly covered on th...
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