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Vector processor and method for generating scrambling code sequence

A technology of vector processor and scrambling code sequence, which is applied in the field of communication, can solve the problem of high cost and achieve the effect of improving processing efficiency

Active Publication Date: 2018-06-08
SANECHIPS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the traditional solution based on hardware acceleration, a dedicated circuit must be designed for each standard, resulting in higher and higher costs in terms of area and power consumption.

Method used

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  • Vector processor and method for generating scrambling code sequence
  • Vector processor and method for generating scrambling code sequence
  • Vector processor and method for generating scrambling code sequence

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Embodiment Construction

[0038] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer and clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0039] The typical operation involved in the communication system is multiply and accumulate, and the algorithm can usually be vectorized to perform operations on many sets of data at the same time. Therefore, the VAU in the vector processor is used to perform multiple multiply-accumulate operations in parallel.

[0040] Since the scrambling code sequence is composed of the gold sequence, and the gold sequence is generated from the m sequence, then, by analyzing the process of generating the gold sequence from the m sequence, the conditions required for...

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Abstract

The invention discloses a vector processor and a method for generating a scrambling code sequence. The vector processor includes a main control unit, a CGU, a VAU, and a memory; the method pre-stores a transformation matrix corresponding to each communication system supported by a communication device; When the above-mentioned communication equipment is powered on and running, load the corresponding transformation matrix according to the communication system enabled by the above-mentioned communication equipment; Transforming the initial state of the matrix and the scrambling code sequence, generating the scrambling code sequence, and directly performing operations on the above scrambling code sequence and the input operand. The invention effectively improves the processing efficiency of the vector processor and supports various communication systems.

Description

technical field [0001] The invention relates to the communication field, in particular to a vector processor and a method for generating scrambling code sequences. Background technique [0002] With the evolution of communication standards, mobile terminals usually need to support multiple communication systems at the same time, such as GSM (Global System for Mobile Communications, Global System for Mobile Communications), WCDMA (Wideband Code Division Multiple Access, Wideband Code Division Multiple Access), HSPA (High Speed Packet Access, high-speed packet access), LTE (Long Term Evolution, long-term evolution), etc. In the traditional solution based on hardware acceleration, a special circuit must be designed for each standard, resulting in higher and higher costs in terms of area and power consumption. The vector processor effectively enhances the computing power of the processor by supporting vector computing, and its programmability also makes it suitable for supporti...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L1/00
Inventor 罗新
Owner SANECHIPS TECH CO LTD