Redundant path power subsystem and operation method thereof
A technology of redundant paths and subsystems, applied in the field of fault-tolerant arrays, which can solve problems such as phase-level redundancy
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[0009] The following description includes exemplary systems, methods, techniques, instruction sequences, and computer program products that implement techniques of the inventive subject matter. However, it is understood that the embodiments may be practiced without these specific details. For example, although the examples refer to a serial peripheral interface (SPI) bus for communication between the multiplexing logic device and the microprocessor, the embodiments are not limited thereto. Embodiments may use a serial input / output exchange (SIOX) bus, a controller area network (CAN) bus, etc. for communication between the multiplexing logic device and the microprocessor. Embodiments are also not limited to utilizing an inter-integrated circuit (I2C) bus for communication between multiplexing logic and power supplies. Embodiments may utilize a System Management Bus (SMBus), Power Management Bus (PMBus), etc. for communicating between multiplexing logic and power supplies. In ...
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