Static random access memory with asymmetric transistors and its control method

A static random, transistor technology, applied in static memory, digital memory information, information storage, etc., can solve the problem of not meeting the size requirements of bit line access transistors, and achieve enhanced stability, improved data writing capability, and leakage power consumption. reduced effect

Active Publication Date: 2016-01-20
THE HONG KONG UNIV OF SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Clearly, the transistors described above cannot meet the conflicting size requirements for bit line access transistors in SRAM cells

Method used

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  • Static random access memory with asymmetric transistors and its control method
  • Static random access memory with asymmetric transistors and its control method
  • Static random access memory with asymmetric transistors and its control method

Examples

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Embodiment Construction

[0067] Hereinafter, multiple implementations of the present application will be described in detail with reference to the accompanying drawings in a manner that can be easily implemented by those skilled in the art to which the present application belongs. The following descriptions are only illustrative and not restrictive, and the application should not be interpreted as being limited to the implementations described herein, and should be understood as including all changes and equivalents without departing from the idea and technical scope of the application and alternatives.

[0068] The terms used in this application are only used to describe specific embodiments, and are not used to limit the invention. For example, terms such as "comprising", "having" or "having" in this application should be understood as only used to clarify the existence of the specific numbers, steps, actions, constituent elements, components or combinations thereof, and are not to preclude The exi...

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Abstract

The invention discloses a non-symmetric transistor, a static random access memory with the non-symmetric transistor, and a control method of the static random access memory. The non-symmetric transistor comprises a first doped region at a first end of a transistor and a second doped region at a second end of the transistor, with the second end being opposite to the first end in a first direction, and further comprises a channel region between the first doped region and the second doped region, and a grid electrode disposed on the channel region. The first doped region and the second doped region are doped with impurities of first type. The magnitude of the conducting current from the first end to the second end of the transistor is different from that from the second end to the first end. According to the invention, the data reading stability is improved, the data writing ability is improved and the electric leakage power consumption is reduced in the data access process.

Description

technical field [0001] The present application relates to an asymmetric transistor, a static random access memory using the asymmetric transistor as a bit line access device, and a control method of the static random access memory. Background technique [0002] Static random access memory (SRAM; StaticRandomAccessMemory) is widely used in high-performance microprocessors and on-chip systems. The amount of on-chip memory continues to increase with each new technology node to meet the ever-increasing performance demands of modern microprocessors and systems-on-chip. With the advancement of semiconductor technology nodes, the power supply voltage continues to decrease, and the device size continues to shrink, which weakens the read data stability and write operation capabilities of Static Random Access Memory (SRAM). At the same time, a large number of transistors are used in the static random access memory array of modern microprocessors, and the memory array is therefore a s...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/423H01L29/06G11C11/413
CPCG11C11/419H01L29/4232H01L29/783H01L29/7831
Inventor 沃尔堪·库尔散沙伊尔弗·穆罕默德·萨拉赫丁焦海龙
Owner THE HONG KONG UNIV OF SCI & TECH
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