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Low-dropout linear regulator

A technology of low-dropout linear and linear voltage regulators, which is applied in the direction of instruments, electric variable adjustment, control/regulation systems, etc., and can solve the problems of increased static power consumption, occupied area, and increased static power consumption of linear voltage regulators, etc. , to achieve the effect of fast response and small pull-up range

Active Publication Date: 2015-06-10
XI AN UNIIC SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of this approach is: when the output current is large, the static power consumption of the second-stage operational amplifier will increase, increasing the overall static power consumption of the linear regulator, and the additional current detection circuit introduced will increase the increases the complexity of the design and takes up additional area

Method used

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Embodiment Construction

[0016] The present invention is described in further detail below in conjunction with accompanying drawing:

[0017] refer to figure 2 , the low dropout linear voltage regulator of the present invention includes a linear voltage regulator, a first PMOS transistor T1, a second PMOS transistor T2, a first NMOS transistor T3, a second NMOS transistor T4, a first capacitor C1, a second Capacitor C2 and inverting amplifier U1; the drains of the first PMOS transistor T1 are respectively connected to the source of the second PMOS transistor T2, the source of the first PMOS transistor T1 is connected to the linear regulator, and the first PMOS The drain of the transistor T1 is connected to the source through the second capacitor C2, the drain of the second PMOS transistor T2 is connected to the drain of the first NMOS transistor T3, and the source of the first NMOS transistor T3 is connected to the second NMOS transistor T3 The drain of the transistor T4 is connected, the source and...

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Abstract

The invention provides a low-dropout linear regulator which comprises a linear regulator body, a first P-channel metal oxide semiconductor (PMOS) tube, a second PMOS tube, a first N-channel metal oxide semiconductor (NMOS) tube, a second NMOS tube, a first capacitor, a second capacitor and an inverting amplifier. A drain electrode of the first PMOS tube is connected with a source electrode of the second PMOS tube, a source electrode of the first PMOS tube is connected with the linear regulator body, and the drain electrode and the source electrode of the first PMOS tube are connected through the second capacitor. A drain electrode of the second PMOS tube is connected with a drain electrode of the first NMOS tube, a source electrode of the first NMOS tube is connected with a drain electrode of the second NMOS tube, a source electrode and the drain electrode of the second NMOS tube are connected through the first capacitor, and the source electrode of the NMOS tube is grounded. The input end of the inverting amplifier is respectively connected with a grid electrode of the second PMOS tube and a grid electrode of the first NMOS tube, and the output end of the inverting amplifier is respectively connected with a grid electrode of the first PMOS tube and a grid electrode of the second NMOS tube. The low-dropout linear regulator can effectively reduce voltage fluctuation of output voltage.

Description

technical field [0001] The invention relates to a voltage stabilizer, in particular to a low dropout linear voltage stabilizer. Background technique [0002] With the continuous upgrading of JEDEC interface standards, the clock frequency of DRAM continues to increase. The current consumed by the internal logic circuits of the DRAM is also increasing. At the same time, the feature size of the DRAM process is continuously reduced, and the chip area is also being compressed, which poses a challenge to the design of the linear voltage regulator used for logic circuit power supply in the DRAM. In order to achieve the goal of smaller voltage fluctuations, the linear regulators used in DRAM currently use the method of increasing the static power consumption of the regulator's own operational amplifier to improve the response speed of the linear voltage regulation itself, or increasing the linear voltage regulation. On-chip capacitance on the output voltage network of the converte...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05F1/56
Inventor 贾雪绒
Owner XI AN UNIIC SEMICON CO LTD