Circuit structure capable of preventing internal memory cell of memory chip from being rewritten during powering up or down

Abstract

The invention relates to the safety design of a memory chip, in particular to a circuit structure capable of preventing an internal memory cell of a memory chip from being rewritten during powering up or down. The circuit structure is simple and low in cost, and the problem that the internal memory cell is rewritten during powering up or down can be prevented. The circuit structure comprises a reset circuit which is connected with a memory control logic circuit and the memory cell, wherein the memory cell is connected with the memory control logic circuit through a control wire, an address wire and a data wire; and the memory control logic circuit is connected with a chip interface circuit. The circuit structure is characterized in that a reset address control logic circuit is arranged on the memory control logic circuit.

Description

technical field [0001] The invention relates to a security design of a memory chip, in particular to a circuit structure for preventing rewriting of a storage unit inside the memory chip by powering on and off. Background technique [0002] I2C, SPI and other serial memory chips generally have an internal reset circuit to reset the system during the power-on and power-off process to prevent the chip from malfunctioning during the power-on and power-off process and to prevent the internal storage unit from being accidentally rewritten. However, in practical applications, when the chip is powered on and off, if the internal reset signal has disappeared, but it is still in an undervoltage state, the control circuit inside the chip will work in an unstable state, which may cause internal faults in the chip. Possibility of the storage unit being overwritten. [0003] The internal architecture commonly used in general-purpose memory chips such as figure 1 , in the process of pow...

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Problems solved by technology

[0004] At present, the general practice in the design of memory chips is to increase the minimum threshold voltage of the reset unit as much as possible in combination with the minimum working voltage of the chip and the deviation of the process, so as to ensure that the control part of the chip can operate under this working voltage (that is, the thre

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