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Low-dropout linear voltage stabilizer

A low-dropout linear and voltage regulator technology, applied in the direction of instruments, regulating electrical variables, control/regulation systems, etc., can solve problems such as deterioration, achieve the effect of improving PSRR and increasing circuit stability

Active Publication Date: 2014-04-09
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the traditional LDO, the stability of the circuit depends on the increased Miller capacitor Cc, but the access of the Miller capacitor Cc seriously deteriorates the PSRR (Power Supply Rejection Ratio, power supply rejection ratio)

Method used

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Embodiment Construction

[0019] The implementation of the present invention is described below through specific examples and in conjunction with the accompanying drawings, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific examples, and various modifications and changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0020] A low-dropout linear voltage regulator of the present invention adds a common-gate amplifier between the gate of the adjustment tube and the Miller capacitance, and the common-gate amplifier buffers the sampling of the Miller capacitance and feeds it back to the output terminal of the error amplifier to realize the The Le capacitor is isolated from the gate of the pass tube, so as to ...

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Abstract

The invention discloses a low-dropout linear voltage stabilizer. The low-dropout linear voltage stabilizer comprises an error amplifier, a regulation pipe, a sampling circuit and a miller capacitor, and further comprises a cathode-input amplifier. The cathode-input amplifier is arranged between the miller capacitor and the grid electrode of the regulation pipe. The miller capacitor is connected with the cathode-input amplifier and the drain electrode of the regulation pipe. The cathode-input amplifier buffers samples of the miller capacitor and then feeds the samples back to the output end of the error amplifier. The miller capacitor and the grid electrode of the compensating pipe are isolated through a buffer while main poles and auxiliary poles are separated, and therefore the aims of increasing stability of the circuit and improving the PSRR are achieved.

Description

technical field [0001] The present invention relates to a low dropout linear regulator (LDO, Low Dropout Regulator), in particular to a low dropout linear regulator with high stability and high PSRR. Background technique [0002] Recently, more and more occasions need to use LDO (Low Dropout Linear Regulator) to power the chip. In SoCs, the demand for capless LDOs is more extensive, and AC stability is a very important performance when designing capacitive LDOs. [0003] figure 1 A schematic circuit diagram of a traditional LDO. Such as figure 1 As shown, the traditional LDO includes an error amplifier, adjustment tube mpd and sampling circuit, the differential pair of the error amplifier circuit composed of NMOS transistors mn1 and mn2, the source of the differential pair is connected to the bias current source, and the PMOS transistors mp1 and mp2 are composed The mirror current source is used as the active load of the differential pair. One input terminal of the error...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05F1/56
Inventor 徐光磊
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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